Semiconductor device having semiconductor memory with sense...

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S145000, C365S189090

Reexamination Certificate

active

07142473

ABSTRACT:
A semiconductor device comprises a memory cell array, bit line, /bit line complementary to the bit line, reference voltage generating circuit and sense amplifier. The bit line is connected to the memory cells and applied with a voltage read from each memory cell of the memory cell array. The /bit line is supplied with a reference voltage. The reference voltage generating circuit generates the reference voltage that has temperature dependence for compensating a change in the voltage, read to the bit line, due to temperature. The reference voltage generating circuit controls the reference voltage such that the reference voltage assumes a midpoint of trails of a signal value distribution indicative of “0” data and a signal value distribution indicative of “1” data. The sense amplifier compares the voltage, read to the bit line, with the reference voltage supplied to the /bit line, and amplifies the difference therebetween.

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patent: 2003/0227809 (2003-12-01), Schwartz

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