Semiconductor device having semiconductor chip on base...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond

Reexamination Certificate

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Details

C257S779000

Reexamination Certificate

active

07345369

ABSTRACT:
A semiconductor device includes: a base member; a solder layer; and a semiconductor chip disposed on the base member through the solder layer. The chip has an in-plane temperature distribution when the chip is operated. The chip has an allowable maximum temperature as a temperature limit of operation. The in-plane temperature distribution of the chip provides a temperature of the chip at each position of a surface of the chip. The temperature margin at each position is obtained by subtracting the temperature of the chip from the allowable maximum temperature. The solder layer has an allowable maximum diameter of a void at each position, the void being disposed in the solder layer. The allowable maximum diameter of the void at each position becomes larger as the temperature margin at the position becomes larger.

REFERENCES:
patent: 5361973 (1994-11-01), Ishii et al.
patent: 6122177 (2000-09-01), Kitano et al.
patent: 6448646 (2002-09-01), Kitano et al.
patent: A-54-037572 (1979-03-01), None
patent: A-2-144928 (1990-06-01), None
patent: A-2003-151998 (2003-05-01), None
patent: 2004146512 (2004-05-01), None

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