Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-11-14
2006-11-14
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S382000, C257S383000
Reexamination Certificate
active
07135744
ABSTRACT:
According to embodiments of the invention, word line patterns are placed on a semiconductor substrate in a cell array region and at least one gate pattern is placed on the semiconductor substrate in a peripheral circuit region. Side walls of the word line patterns and the gate pattern are covered with word line spacers and gate spacers having the same width as that of the word line spacers, respectively. The semiconductor substrate having the word line spacers and the gate spacers is covered with an interlayer insulating layer. A self-aligned contact hole formed in the interlayer insulating layer penetrates a predetermined region between the word line patterns. The self-aligned contact hole is formed by etching the interlayer insulating layer and the word line spacers. The side walls of the self-aligned contact hole are covered with a self-aligned contact spacer having a width different from that of the gate spacers.
REFERENCES:
patent: 5817562 (1998-10-01), Chang et al.
patent: 6091154 (2000-07-01), Ohkawa
patent: 6159806 (2000-12-01), Chern et al.
patent: 6649503 (2003-11-01), Kim et al.
patent: 6864580 (2005-03-01), Nakazawa et al.
patent: 6870230 (2005-03-01), Matsuda et al.
Cao Phat X.
Marger & Johnson & McCollom, P.C.
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