Semiconductor device having recess gate and isolation...

Details Semiconductor device having recess gate and isolation... Semiconductor device having recess gate and isolation...

2008-12-23

2010-06-15

Everhart, Caridad M (Department: 2895)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C257SE21549, C257SE21384, C257S330000

Reexamination Certificate

active

07737017

ABSTRACT:
Disclosed herein is a semiconductor device including an isolation structure and a recess gate and a method for fabricating the same. The method for fabricating a semiconductor device includes: forming a trench by selectively etching an isolation region of a semiconductor substrate to define an active region; forming a first SOD partially filling the trench; forming a stress shielding layer, which is denser than the first SOD, over the first SOD; forming a second SOD that fills the trench over the first SOD including the stress shielding layer; forming a recess groove by selectively etching a portion of the active region, wherein an upper surface of the first SOD is spaced downwardly from a bottom of the recess groove, and an upper surface of the stress shielding layer is spaced upwardly from the bottom of the recessed groove; and forming a gate of a transistor that fills the recess groove.

REFERENCES:
patent: 7071107 (2006-07-01), Hieda et al.
patent: RE39690 (2007-06-01), Kalnitsky et al.
patent: 7332408 (2008-02-01), Violette
patent: 7588985 (2009-09-01), Kim
patent: 2006/0113590 (2006-06-01), Kim et al.
patent: 2007/0063270 (2007-03-01), Cho et al.

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