Semiconductor device having power MOS transistor including paras

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257357, 257358, H01L 2362

Patent

active

059124962

ABSTRACT:
A semiconductor device has a power MOSFET 12 connected between a semiconductor substrate 21 of N-type as an output terminal 15 and a GND terminal 16 connected to a first semiconductor layer 22 formed on the semiconductor substrate 21 and having a gate connected to a first node for controlling the supply of electric current to a load connected between the GND terminal and the output terminal, a control circuit receiving an input signal and controlling an operation of the power MOSFET in response to the input signal, an input terminal provided in a second semiconductor layer 23 of N-type formed on the first semiconductor layer 22, a parasitic transistor 24 connected between the semiconductor substrate and the second semiconductor layer, and having a base connected to the first semiconductor layer, and switching circuit for keeping the parasitic transistor at a non-conductive state.

REFERENCES:
patent: 4692781 (1987-09-01), Rountree et al.
Bruun et al., "Reverse-Voltage Protection Methods for CMOS Circuits", IEEE Journal of Solid-State Circuits, vol. 24, No. 1, pp. 100-103, Feb. 1989.

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