Semiconductor device having PLL-circuit

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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C365S233100

Reexamination Certificate

active

06952373

ABSTRACT:
A semiconductor device includes a clock input terminal to which external clocks are supplied; a PLL circuit, which is supplied with the external clocks and generate first internal clocks; a logic circuit, which operates in synchronization with the internal clocks; and an internal counter, which counts the first internal clocks when the PLL circuit is tested. The internal counter is provided with an output terminal from which an output signal thereof is supplied to an external circuit.

REFERENCES:
patent: 5946244 (1999-08-01), Manning
patent: 6078533 (2000-06-01), Lee
patent: 6400625 (2002-06-01), Arimoto et al.
patent: 6512707 (2003-01-01), Miura et al.
patent: 6807116 (2004-10-01), Yamazaki et al.

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