Semiconductor device having multilayer metal interconnection

Details Semiconductor device having multilayer metal interconnection Semiconductor device having multilayer metal interconnection

1997-12-04

2000-06-20

Tran, Minh Loan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257314, 257324, H01L 2976, H01L 2988, H01L 29792

Patent

active

060780746

ABSTRACT:
An n-type diffused layer is formed in a p-type semiconductor substrate. A control gate electrode of a memory cell MC is connected with a metal interconnect of a first layer and the metal interconnect is connected with the diffused layer. Moreover, a metal interconnect of the first layer is connected with a metal interconnect of a second layer. An interconnect of the second layer is connected with the output node of a row decoder.

REFERENCES:
patent: 4892840 (1990-01-01), Esquivel et al.
patent: 5151761 (1992-09-01), Takebuchi
patent: 5338969 (1994-08-01), Kaya
patent: 5365103 (1994-11-01), Brown et al.

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