Semiconductor device having MOS transistors and bipolar...

Details Semiconductor device having MOS transistors and bipolar... Semiconductor device having MOS transistors and bipolar...

2005-08-02

2005-08-02

Pham, Hoai (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S378000

Reexamination Certificate

active

06924534

ABSTRACT:
The invention is directed to reducing of the number of steps in a BiCMOS process. A first N-well3A and a second N-well3B are formed deeply on a surface of a P-type semiconductor substrate. A first P-well4A is formed in the first N-well3A, and an N-channel MOS transistor is formed in the first P-well4A. The second N-well3B is used as a collector of a vertical NPN bipolar transistor. A second P-well4B is formed in the second N-well3B. The second P-well4B is formed simultaneously with the first P-well4A. The second P-well4B is used as a base of the vertical NPN bipolar transistor. An N+ emitter layer and a P+ base electrode layer of the vertical NPN bipolar transistor are formed on a surface of the second P-well4B.

REFERENCES:
patent: 6649983 (2003-11-01), Chatterjee

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