Static information storage and retrieval – Systems using particular element – Semiconductive
Reexamination Certificate
2007-12-18
2007-12-18
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Systems using particular element
Semiconductive
C365S175000, C365S174000, C365S096000, C365S104000, C365S105000, C365S156000, C365S230030, C365S225700, C341S144000, C341S121000, C341S120000
Reexamination Certificate
active
11409963
ABSTRACT:
A DAC having a memory mat including a plurality of first memory cells, and a plurality of output lines connected to the plurality of first memory cells. Each of the plurality of memory cells has a first memory portion including bipolar transistors and storing information in non-volatility based on whether a junction of the bipolar transistors is destroyed or not, and a second memory portion connected to the first memory portion and for outputting information to corresponding one of the plurality of output lines. The DAC has a first mode in which information is transferred from the first memory portions to the second memory portions when the information is written into the second memory portions, and a second mode in which the second memory portions are specified externally and information is written into the second memory portions.
REFERENCES:
patent: 3898483 (1975-08-01), Sander et al.
patent: 3949243 (1976-04-01), Sander et al.
patent: 4866674 (1989-09-01), Tran
patent: 5426526 (1995-06-01), Yamamoto et al.
patent: 5581508 (1996-12-01), Sasaki et al.
patent: 5966324 (1999-10-01), Wada et al.
patent: 6107659 (2000-08-01), Onakado et al.
patent: 6225933 (2001-05-01), Salter et al.
patent: 6989580 (2006-01-01), Pellizzer et al.
patent: 7071533 (2006-07-01), Kimber et al.
patent: 2006/0049392 (2006-03-01), Pellizzer et al.
patent: 7-141041 (1995-06-01), None
patent: 11-339205 (1999-12-01), None
patent: 2000-48591 (2000-02-01), None
patent: 2002-231887 (2002-08-01), None
patent: 2002-319300 (2002-10-01), None
patent: 2006-311001 (2006-11-01), None
Kogayu Hiroshige
Kusunoki Mitsugu
Mori Kazutaka
Sahara Ryusuke
Hitachi , Ltd.
Miles & Stockbridge P.C.
Tran Andrew Q.
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