Patent
1991-01-24
1991-11-19
James, Andrew J.
357 80, 357 67, H01L 2312, H01L 2160
Patent
active
050670077
ABSTRACT:
Attempts have been made to increase the number of pins of packages accompanying the trend toward fabricating integrated circuits highly densely and in smaller sizes. The present invention provides technology for improving reliability in fabricating packages of the surface-mounted type that have increased number of pins. That is, when the packages are mounted on the wiring substrate, the lead pins that receive load from the axial direction exhibit bending strength which is smaller than the junction strength of solder at the junction portions. To achieve this object, the lead pins are made of a material having large resiliency such as a fiber-reinforced material, a transformation pseudo elastic material, an ultra-high tension material, or a heat-resistant ultra-high tension material.
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"Wirebonding Chips to Boards May Speed Surface Mounting", Technology to watch, Electronics/May 12, 1986.
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Kato Masao
Kawashima Masayuki
Kubo Kazutoshi
Kumagai Takashi
Kuroda Shigeo
Hitachi , Ltd.
Hitachi VLSI Engineering Corp.
James Andrew J.
Nguyen Viet Q.
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