Semiconductor device having leads for mounting to a surface of a

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357 80, 357 67, H01L 2312, H01L 2160

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active

050670077

ABSTRACT:
Attempts have been made to increase the number of pins of packages accompanying the trend toward fabricating integrated circuits highly densely and in smaller sizes. The present invention provides technology for improving reliability in fabricating packages of the surface-mounted type that have increased number of pins. That is, when the packages are mounted on the wiring substrate, the lead pins that receive load from the axial direction exhibit bending strength which is smaller than the junction strength of solder at the junction portions. To achieve this object, the lead pins are made of a material having large resiliency such as a fiber-reinforced material, a transformation pseudo elastic material, an ultra-high tension material, or a heat-resistant ultra-high tension material.

REFERENCES:
patent: 4703393 (1987-10-01), Yamamoto et al.
patent: 4811082 (1989-03-01), Jacobs et al.
patent: 4816426 (1989-03-01), Bridges et al.
patent: 4868638 (1989-09-01), Hirata et al.
"Wirebonding Chips to Boards May Speed Surface Mounting", Technology to watch, Electronics/May 12, 1986.
"Denshi Zairyo", published by Kogyo Chosakai Ltd., Sep. 1, 1987, pp. 40-50.
"Shape Memory Alloys", published by Sangyo Tosho Co., Jun. 7, 1984, pp. 1-3 and 34-36.

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