Semiconductor device having latch means

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...

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365233, G11C 800

Patent

active

050864149

ABSTRACT:
A semiconductor circuit having a plurality of circuit blocks, each having latch circuits each one thereof being controlled by an internally provided clock signal for preventing malfunction of the circuit. Each circuit is provided with the latch function so that the cycle time is made shorter than the access time. Moreover, the latch means are driven in such a manner that the adjoining ones are prevented from being put to through-state simultaneously, whereby malfunction is prevented.

REFERENCES:
patent: 4541075 (1985-09-01), Dill et al.
patent: 4685088 (1987-08-01), Iannucci

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