Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-03-21
2006-03-21
Mai, Son (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S205000, C365S208000
Reexamination Certificate
active
07016258
ABSTRACT:
Provided is a semiconductor device that is insensitive to a change in a power supply voltage, inconsistencies in a manufacturing process, and a change in temperature and provides for a rapid read data operation. The semiconductor device includes a first read signal generator, a second read signal generator, and a voltage input/output sense amplifier. The first read signal generator generates a first read signal for sampling data in response to an enable signal of a column selection line. The second read signal generator generates a second read signal including a plurality of pulses during an enabling period of the first read signal in response to the first read signal. The voltage input/output sense amplifier receives a data value output from a memory cell, amplifies the data value in synchronization with the column selection line, and samples the data value in synchronization with enabling signals of the second read signal.
REFERENCES:
patent: 5007024 (1991-04-01), Tanaka et al.
patent: 5386389 (1995-01-01), Taoka
patent: 5594695 (1997-01-01), Yim et al.
patent: 6031769 (2000-02-01), Kim
Mai Son
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
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