Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Input noise margin enhancement
Patent
1995-06-21
1996-07-16
Hudspeth, David R.
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Input noise margin enhancement
326 21, 326103, H03K 1716
Patent
active
055370586
ABSTRACT:
In a semiconductor device, an input voltage is applied to a gate of a first MIS transistor of a first conductivity type and gates of second and third MIS transistors of a second conductivity type. The first MIS transistor is connected between a first power supply pad and an output node, the second MIS transistor is connected between the output node and a second power supply pad, and the third MIS transistor is connected between the output node and a third power supply pad.
REFERENCES:
patent: 488978 (1889-11-01), Ohshima et al.
patent: 4563595 (1986-01-01), Bose
patent: 5274280 (1993-12-01), Ito et al.
patent: 5319260 (1994-06-01), Wanlass
Hudspeth David R.
NEC Corporation
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