Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
1998-12-01
2001-01-23
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
28, 28, 28
Reexamination Certificate
active
06177687
ABSTRACT:
FIELD OF THE INVENTION
The present invention is directed generally to semiconductor devices and, more particularly, to a semiconductor device having a gate electrode shared between two sets of active regions and a method fabricating such as device.
BACKGROUND OF THE INVENTION
Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One such silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor.
The principal elements of a typical MOS semiconductor device are illustrated in FIG.
1
. The device generally includes a semiconductor substrate
101
on which a gate electrode
103
is disposed. The gate electrode
103
acts as a conductor. An input signal is typically applied to the gate electrode
103
via a gate terminal (not shown). Heavily-doped source/drain regions
105
are formed in the semiconductor substrate
101
and are connected to source/drain terminals (not shown). The typical MOS transistor is symmetrical, which means that the source and drain are interchangeable. Whether a region acts as a source or drain depends on the respective applied voltages and the type of device being made (e.g., PMOS, NMOS, etc.).
A channel region
107
is formed in the semiconductor substrate
101
beneath the gate electrode
103
and separates the source/drain regions
105
. The channel is typically lightly doped with a dopant of a type opposite to that of the source/drain regions
105
. The gate electrode
103
is generally separated from the semiconductor substrate
101
by an insulating layer
109
, typically an oxide layer such as SiO
2
. The gate insulating layer
109
is provided to prevent current from flowing between the gate electrode
103
and the source/drain regions
105
or channel region
107
.
After the source/drains
105
have been formed, a relatively thick oxide layer (not shown), referred to as a contact formation layer, is disposed over the substrate
101
. Openings are generally cut into the contact formation layer to expose the source/drain regions
105
and the surface of the gate electrode
103
. The exposed areas are then filled with a metal, such as tungsten, to form contacts which are used to connect the active elements with other devices on the chip.
In operation, an output voltage is typically developed between the source and drain terminals. When an input voltage is applied to the gate electrode
103
, a transverse electric field is set up in the channel region
107
. By varying the transverse electric field, it is possible to modulate the conductance of the channel region
107
between the source region and the drain region. In this manner, an electric field controls the current flow through the channel region
107
. This type of device is commonly referred to as a MOS field-effect-transistor (MOSFET).
Semiconductor devices, like the one described above, are used in large numbers to construct most modem electronic devices. In order to increase the capability of such electronic devices, it is necessary to integrate even larger numbers of such devices into a single silicon wafer. As the semiconductor devices are scaled down (i.e., made smaller) in order to form a larger number of devices on a given surface area, the structure of the devices and fabrication techniques used to make such devices must be altered.
SUMMARY OF THE INVENTION
Generally, the present invention provides semiconductor devices having a gate electrode shared by two sets of active regions and methods of manufacture thereof. In accordance with one embodiment of the invention, a semiconductor device is formed by forming a gate electrode above a first substrate and below a second substrate, forming a first set of active regions below the gate electrode and associated with the first substrate, and forming a second set of active regions above the gate electrode and associated with the second substrate. The two sets of active regions may, for example, be used separately to effectively form two transistors. The two sets of active regions may, alternatively, be coupled to effectively form a single transistor.
A semiconductor device, according to another embodiment, includes a first substrate and a gate electrode disposed over the first substrate. A second substrate is disposed over the gate electrode. A first set of active regions is disposed in portions of the first substrate adjacent the gate electrode and a second set of active regions is disposed above the gate electrode and adjacent the second substrate. As noted above, the two sets of active regions may, for example, be used separately or coupled together.
The above summary of the present invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and the detailed description which follow more particularly exemplify these embodiments.
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patent: 5310696 (1994-05-01), McCann et al.
patent: 5324960 (1994-06-01), Pfiester et al.
patent: 5714394 (1998-02-01), Kadosh et al.
patent: 5757047 (1998-05-01), Nakamura
patent: 5843816 (1998-12-01), Liaw et al.
patent: 5852310 (1998-12-01), Kadosh et al.
patent: 5882959 (1999-03-01), Kadosh et al.
patent: 5939749 (1999-08-01), Taketa et al.
patent: 5949092 (1999-09-01), Kadish et al.
patent: WO 93/09567 (1993-05-01), None
Fulford H. Jim
Gardner Mark I.
Advanced Micro Devices
Clark Sheila V.
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