Semiconductor device having gate electrode and impurity diffusio

Details Semiconductor device having gate electrode and impurity diffusio Semiconductor device having gate electrode and impurity diffusio

1995-04-18

1996-05-28

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257903, 257904, 257382, 257383, 257384, 257754, 257755, 257757, H01L 31062, H01L 31113, H01L 31119

Patent

active

055214169

ABSTRACT:
A poly-crystal silicon layer is formed on an N-type silicon substrate via an oxide film. A contact hole is formed on the poly-crystal silicon layer by applying a photoresist mask and further by patterning a predetermined contact portion between a polyside gate and a diffusion layer. Thereafter, a P.sup.+ diffusion layer is formed by ion implantation with the use of the same photoresist mask. Further, a tungsten siliside layer is deposited all over the substrate. Or else, after the contact hole has been formed, the tungsten siliside layer is deposited, and then the P.sup.+ diffusion layer is formed by ion implantation. Alternatively, after the contact hole has been formed, a first ion implantation is made; and after the tungsten siliside layer has been deposited, a second ion implantation is made to form the P.sup.+ diffusion layer. In the manufacturing method as described above, an ohmic contact can be realized between the polyside gate electrode and the diffusion layer via the tungsten siliside layer, irrespective of the conductivity types of the gate electrode and the diffusion layer, without use of any additional metallic layer other than the polyside.

REFERENCES:
patent: 4621276 (1986-11-01), Malhi

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