Semiconductor device having fully and partially depleted SOI...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S347000, C257S350000, C257S351000

Reexamination Certificate

active

07005706

ABSTRACT:
A semiconductor device includes a silicon layer on an insulating layer. The silicon layer has a first area and a second area. An FD-MOSFET is formed in the first area and a PD-MOSFET is formed in the second area. The semiconductor device satisfies the following formulas: the thickness of the silicon layer is 28 nm to 42 nm, the impurity concentration Df cm−3of the first area is Df≦9.29*1015*(62.46−ts) and Df≦2.64*1015*(128.35−ts), and the impurity concentration Dp of the second area is Dp≦9.29*1015*(62.46−ts) and Dp≦2.64*1015*(129.78−ts).

REFERENCES:
patent: 6222234 (2001-04-01), Imai
patent: 6368938 (2002-04-01), Usenko
patent: 6461907 (2002-10-01), Imai
patent: 6537891 (2003-03-01), Dennison et al.
patent: 6724045 (2004-04-01), Ushiku
patent: 6914295 (2005-07-01), Chau et al.
patent: 2003/0227056 (2003-12-01), Wang et al.
patent: 09-135030 (1997-05-01), None
patent: 11-298001 (1999-10-01), None

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