Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2008-01-10
2010-10-26
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S197000, C438S770000, C438S311000, C257SE21170, C257SE21320, C257SE21051, C257SE21058, C257SE21077, C257SE21218, C257SE21277, C257SE21229, C257SE21267, C257SE21304, C257SE21319, C257SE21421
Reexamination Certificate
active
07820551
ABSTRACT:
A line-form insulator is formed on a substrate and then the substrate is etched with the insulator used as a mask to form first trenches on both sides of the insulator. Side wall insulators are formed on the side walls of the first trenches, the substrate is etched with the insulator and side wall insulators used as a mask to form second trenches in the bottom of the first trenches. After, the substrate is oxidized with the insulator and side wall insulators used as an anti-oxidation mask to cause oxide regions formed on the adjacent side walls of the second trenches lying on both sides of the substrate to make contact with each other and the insulator and side wall insulators are removed. Then, a fin FET having a semiconductor region as a line-form fin is formed in the substrate.
REFERENCES:
patent: 7326619 (2008-02-01), Park et al.
patent: 7393733 (2008-07-01), Currie
patent: 7488650 (2009-02-01), Schulz
patent: 2006/0275988 (2006-12-01), Yagishita et al.
patent: 2005-229107 (2005-08-01), None
Kaneko Akio
Yagishita Atsushi
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Nhu David
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