Semiconductor device having dummy wiring pattern therein and man

Details Semiconductor device having dummy wiring pattern therein and man Semiconductor device having dummy wiring pattern therein and man

1991-10-29

1994-02-22

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Differential sensing

365185, 365182, H01L 2170, H01L 2968

Patent

active

052894223

ABSTRACT:
A are a semiconductor memory device excellent memory characteristics of which can be obtained without deteriorating a characteristic of a transistor for use in a peripheral circuit even when a memory cell array region and a peripheral circuit region differ from each other in wiring pattern density and a manufacturing method therefor. The semiconductor memory device includes a dummy pattern formed between and at predetermined distance from gate electrodes of a transfer gate transistor in the peripheral circuit region. As a result, precision in dimension of the gate electrode in the peripheral circuit portion is improved to achieve excellent memory characteristics without deteriorating the transistor

REFERENCES:
patent: 4841483 (1989-06-01), Furuyama
patent: 4994893 (1991-02-01), Ozaki et al.
Article entitled "The Loading Effect in Plasma Etching", by C. J. Magab, J. Electrochem. Soc, Solid-State Science and Technology, Aug. 1977.

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