Semiconductor device having concave electrode and convex...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S239000, C438S253000, C438S255000, C438S396000, C438S398000, C257S306000, C257S309000, C257S532000

Reexamination Certificate

active

06653230

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having concave electrode and convex electrode and method of manufacturing thereof; and especially relates to semiconductor device having concave capacitor electrode and convex wiring electrode and method of manufacturing thereof in a DRAM (Dynamic Random Access Memory) etc.
2. Description of the Related Art
In typical DRAMs, each memory cell comprises one MOS (Metal Oxide Semiconductor) transistor and one capacitor for storing information. To secure larger capacitance, the technique in which the storage electrode portion of the capacitor is given a cylinder shape is widely employed.
FIG. 15
is a plan view showing the structure of a DRAM memory cell portion having a cylinder-shaped capacitor which is proposed in Symposium on VLSI Technology Digest of Technical Papers, pp. 22-23, 1996.
As shown in
FIG. 15
, gate electrodes
7
having sidewalls
9
on their side faces are formed so as to extend in the top-bottom direction in the figure. Source/drain diffusion layers
8
are formed between the gate electrodes
7
so as to be interposed between device isolation oxide films
2
. Cylinder-shaped storage electrodes
13
and a bit contact plug
14
are formed on and connected to the respective source/drain diffusion layers
8
. A counter electrode
17
is formed on each storage electrode
13
via a capacitor insulating film (not shown).
In the conventional example shown in
FIG. 15
, all the intervals between the gate electrodes
7
are substantially the same. That is, the conventional example is designed in such a manner that the interval between the gate electrodes
7
on both sides of the bit contact plug
14
is equal to the interval between the gate electrodes
7
on both sides of each storage electrode
13
. And the diameters of the storage electrodes
13
and the bit contact plug
14
are set approximately the same.
A manufacturing process of this conventional example will be described below with reference to
FIGS. 16
to
18
which are sectional views taken along line XIV~X VIII—X IV~X VIII in FIG.
15
and arranged in order of steps.
As shown in
FIG. 16A
, device isolation oxide films (not shown) and gate oxide films
3
are formed on a p-well region
1
and gate electrodes
7
whose top surfaces are covered with SiN films
6
are formed thereon. All the intervals between the gate electrodes
7
are substantially the same. Then, source/drain diffusion layers
8
are formed by doping of an n-type impurity. Then, sidewalls
9
are formed on the side faces of the laminated films each having a gate electrode
7
and a SiN film
6
.
Then, as shown in
FIG. 16B
, an SiO
2
film
10
is deposited over the entire surface and subjected to anisotropic dry etching, whereby holes for exposing the surfaces of the respective source/drain diffusion layers
8
are formed.
Thereafter, as shown in
FIG. 17A
, a phosphorus-doped polysilicon film
11
and an SiO
2
film
12
are deposited over the entire surface. Then, as shown in
FIG. 17B
, the portion of the SiO
2
film
12
in a bit contact plug forming region is removed selectively and a phosphorus-doped polysilicon film
24
is deposited over the entire surface.
Thereafter, as shown in
FIG. 18A
, the polysilicon film
24
is etched back so that its residual portion is buried in the portion of the polysilicon film
11
in the bit contact plug forming region. Then, as shown in
FIG. 18B
, after removing the top portions of the polysilicon films
11
and
24
by etching, the SiO
2
films
10
and
12
are removed by etching, whereby cylinder-shaped storage electrodes
13
and a bit contact plug
14
are formed.
Although not shown in figures, subsequently, capacitor insulating films and counter electrodes are formed on the surfaces of the respective storage electrodes
13
and the entire surface is covered with an interlayer insulating film. Then, a bit line that is connected to the bit contact plug
24
is formed.
With the recent miniaturization and increased integration densities of semiconductor devices, the intervals between constituent elements such as contacts and gate electrodes have become very small. Therefore, to increase margins for mask alignment errors in photolithography steps, processes using self-alignment have become very important. Further, to reduce the manufacturing cost of DRAMs etc. and shorten the TAT (Turn Around Time), how to decrease the number of times of use of photolithography is an important theme.
In the conventional manufacturing process described above, a cylinder shape is also formed in a bit contact plug forming portion in depositing a polysilicon film
11
to form cylinder-shaped storage electrodes
13
(see FIG.
17
A). Therefore, to form a plug, it is necessary to form holes in SiO
2
film
12
, deposit a phosphorus-doped polysilicon film again, and fill in the hole of the cylinder structure in the bit contact plug forming portion. That is, in the above described conventional manufacturing process, to fill in the hole in the bit contact plug forming portion, it is necessary to additionally execute (1) the photolithography step, (2) the step of selectively etching an SiO
2
film
12
, (3) the step of depositing a polysilicon film
24
, and (4) the step of etching back the polysilicon film
24
.
SUMMARY OF THE INVENTION
An object of the present invention is to overcome the problems existing in the conventional technology to provide a novel semiconductor device and the novel manufacturing method of the semiconductor.
According to one aspect of the invention, there is provided a semiconductor device comprising:
a semiconductor substrate;
a convex electrode formed on said semiconductor substrate;
a first concave electrode formed on said semiconductor substrate, said first concave electrode made of the same layer to said convex electrode, and said first concave electrode having an external diameter greater than an external diameter of said convex electrode; and
a first transistor formed on said semiconductor substrate between said convex electrode and said first concave electrode, and connected said convex electrode and said first concave electrode.
According to another aspect of the invention, there is provided a method of manufacturing a semiconductor device comprising:
forming AMOS transistor on the semiconductor substrate;
forming a spacer layer on said transistor and said semiconductor substrate;
opening a first and a second windows from surface of said spacer layer to a source and a drain regions of said MOS transistor, the internal diameter of said first window being greater than the internal diameter of said second window;
forming a conductive layer on said spacer layer and the inside of said first and second windows so as to fill up the inside of said second window by said conductive layer and to remain concave hollow portion in said first window; and
removing said conductive layer on said spacer layer and said spacer layer to form a concave electrode by said conductive layer in said first window and a convex electrode by said conductive layer in said second window.
In the invention, in forming holes or windows for forming a concave storage electrode and a convex bit contact plug electrode in a spacer film (i.e., SiO
2
film
10
), the diameter of a hole or window for forming the storage electrode is set larger than that of a hole or window for forming the bit contact plug. This makes it possible to form a polysilicon film in the holes for formation of concave storage electrodes and a convex bit contact plug electrode in such a manner that the hole or window for forming the convex bit contact plug electrode is completely filled with the polysilicon film but the hole or window for forming the concave storage electrode are not completely filled with the polysilicon film. That is, whereas cylinder-shaped concave polysilicon films are formed in the hole for forming the respective concave storage electrode forming holes, the hole for forming the convex bit contact plug is completely filled with

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