Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2000-02-23
2003-10-21
Fahmy, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S777000
Reexamination Certificate
active
06635969
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a chip-on-chip structure in which semiconductor chips are joined to each other by overlapping one of the semiconductor chips with the surface of the other semiconductor chip, for example, and a semiconductor chip used therefor.
2. Description of Related Art
Examples of a structure for miniaturizing and increasing the integration density of a semiconductor device include a so-called chip-on-chip structure in which paired semiconductor chips are overlapped with and joined to each other such that their surfaces are opposite to each other.
A semiconductor chip which is applied to the chip-on-chip structure has a plurality of bumps provided on its surface opposite to the other semiconductor chip. In joining the paired semiconductor chips to each other, the respective bumps in the opposite semiconductor chips are pressed against each other with ACF (Anisotropic Conductive Film) interposed between the opposite semiconductor chips. Consequently, a portion between the paired semiconductor chips is sealed with the ACF. Further, a conductive capsule included in the ACF is crushed in respective joints of the bumps, so that energization is possible between the bumps which are joined to each other, thereby achieving electrical connection between the semiconductor chips.
In joining the bumps to each other, however, the conductive capsule in the ACF has to be crushed, so that a relatively long time period (approximately 30 seconds) is required until its conductivity is exhibited. In the semiconductor device having the conventional chip-on-chip structure, therefore, a long time period is required for the fabricating steps.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device having a chip-on-chip structure capable of shortening a time period required for the fabrication.
Another object of the present invention is to provide a semiconductor chip having a structure capable of contributing to an improvement in the productivity of a semiconductor device having a chip-on-chip structure.
A semiconductor device according to the present invention comprises a first semiconductor chip having a connecting member formed on its surface; a second semiconductor chip overlapped with and joined to the surface of the first semiconductor chip and having a connecting member adhering to the connecting member in the first semiconductor chip formed on its surface opposite to the first semiconductor chip; and an inter-chip sealing layer for sealing a portion between the first semiconductor chip and the second semiconductor chip.
According to the present invention, the connecting member in the first semiconductor chip and the connecting member in the second semiconductor chip adhere to each other, so that the first semiconductor chip and the second semiconductor chip are connected to each other.
When the connecting members in the first and second semiconductor chips are composed of gold, a time period required for the connecting member in the first semiconductor chip and the connecting member in the second semiconductor chip to adhere to each other is a relatively short time period, for example, approximately 0.1 seconds. According to the construction of the present invention, therefore, a time period required to fabricate the semiconductor device can be made shorter, as compared with that in construction in which a connecting member in a first semiconductor chip and a connecting member in a second semiconductor chip are connected to each other with ACF (Anisotropic Conductive Film) interposed therebetween.
A portion between the first semiconductor chip and the second semiconductor chip is sealed with an inter-chip sealing layer. Therefore, it is possible to avoid such inconvenience that air, which otherwise exists in the portion between the first semiconductor chip and the second semiconductor chip, is thermally expanded, to damage the first semiconductor chip or the second semiconductor chip. When the first semiconductor chip and the second semiconductor chip are contained in a package, stresses exerted on the first semiconductor chip and the second semiconductor chip can be relieved by the inter-chip sealing layer, thereby making it possible to prevent the first semiconductor chip and the second semiconductor chip from being deformed.
The connecting members in the first semiconductor chip and the second semiconductor chip may be respectively bumps formed in a raised state on the surfaces of the first semiconductor chip and the second semiconductor chip. Further, the connecting member in the first semiconductor chip may be a bump formed in a raised state on the surface of the first semiconductor chip, and the connecting member in the second semiconductor chip may be a pad which is lower than the bump.
Further, the inter-chip sealing layer may be formed by pressing deformable sealing films, which are respectively provided on the surfaces of the first semiconductor chip and the second semiconductor chip, against each other.
In this case, it is preferable that a recess for exposing a front end of a connecting member is formed in at least one of the sealing films in the first semiconductor chip and the second semiconductor chip. Consequently, the sealing film may not be interposed between the connecting member in the first semiconductor chip and the connecting member in the second semiconductor chip, thereby making it possible to cause the connecting member in the first semiconductor chip and the connecting member in the second semiconductor chip to satisfactorily adhere to each other.
It is more preferable that an air extraction groove for extracting air in the recess at the time of joining the first semiconductor chip and the second semiconductor chip is formed in at least one of the sealing films in the first semiconductor chip and the second semiconductor chip. In pressing the sealing film in the first semiconductor chip and the sealing film in the second semiconductor chip against each other, therefore, the air in the recess in the sealing film is allowed to flow out through the air extraction groove. Consequently, it is possible to realize a semiconductor device in which the portion between the first and second semiconductor chips can be satisfactorily sealed without leaving the air between the first semiconductor chip and the second semiconductor chip, and no inconvenience may be caused by mixing bubbles with the portion between the first and second semiconductor chips.
Furthermore, the inter-chip sealing layer may be formed by pressing the deformable sealing film, which is provided in one of the first semiconductor chip and the second semiconductor chip, against the surface of the other of the first and second semiconductor chips. In this case, the connecting member in the first semiconductor chip may be a bump formed in a raised state on the surface of the first semiconductor chip, and the connecting member in the second semiconductor chip may be a pad which is lower than the bump. It is preferable that the sealing film is stacked on the second semiconductor chip and has an opening opposite to the pad. In joining the first semiconductor chip and the second semiconductor chip to each other, therefore, the bump in the first semiconductor chip is guided to the opening formed in the sealing film, so that a front end of the bump is abutted against the pad. Accordingly, the first semiconductor chip and the second semiconductor chip can be satisfactorily aligned with each other, and the first semiconductor chip and the second semiconductor chip can be reliably connected to each other.
It is preferable that an air extraction groove for extracting air in the opening at the time of joining the first semiconductor chip and the second semiconductor chip to each other is formed in the sealing film. By providing the air extraction groove, air between the sealing film and the bump entering the opening is allowed to flow out through the air extraction groove when the
Fahmy Wael
Farahani Dana
Rabin & Berdo P.C.
Rohm & Co., Ltd.
LandOfFree
Semiconductor device having chip-on-chip structure, and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having chip-on-chip structure, and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having chip-on-chip structure, and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3114319