Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2011-04-19
2011-04-19
Le, Thao X (Department: 2892)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S149000, C438S405000, C438S412000, C438S311000, C438S481000, C257S347000, C257S349000, C257S506000
Reexamination Certificate
active
07927962
ABSTRACT:
A method of manufacturing a semiconductor device and a semiconductor device manufactured by the method, the method comprising: (a) forming a buffer layer on a semiconductor substrate; (b) patterning the buffer layer in a first direction to form buffer layer patterns having lateral surfaces and being spaced from each other at predetermined intervals; (c) forming a semiconductor epitaxial layer on and between the buffer layer patterns; (d) forming a first trench in the semiconductor epitaxial layer in a second direction perpendicular to the first direction to expose lateral surfaces of the buffer layer patterns; (e) selectively removing the buffer layer patterns exposed by the first trench to form spaces; (f) forming buried insulation films in the spaces formed by removal of the buffer layer patterns, a portion of semiconductor epitaxial layer being disposed between the buried insulation films; (g) removing a portion of the semiconductor epitaxial layer disposed between the buried insulation films to form a second trench in the first direction; and (h) forming device isolation films in the first and second trenches.
REFERENCES:
patent: 7321144 (2008-01-01), Oh et al.
patent: 2008/0145989 (2008-06-01), Oh et al.
patent: 2009/0039461 (2009-02-01), Henson et al.
Hynix / Semiconductor Inc.
Le Thao X
Marshall & Gerstein & Borun LLP
Tran Thanh Y
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