Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-07-05
2002-03-12
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S355000
Reexamination Certificate
active
06355957
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to SOI (Semiconductor On Insulator) structure MIS (Metal Insulator Semiconductor) type FET (Field Effect Transistor, hereinafter such a transistor is referred to as SOIMISFET). The invention relates particularly to a technique of fixing the body potential of the SOIMISFET.
2. Description of the Background Art
FIG. 41
is a sectional view showing the structure of a conventional SOIMISFET. An insulator
82
is formed on the entire surface of a substrate
81
and a semiconductor layer
90
is formed thereon. Note that the semiconductor layer
90
is sectioned by an element isolation portion
94
which is insulating and in contact with the insulator
82
.
A gate insulating film
95
d
is selectively formed on the upper surface of the semiconductor layer
90
, or on its main surface away from the contact with the insulator
82
, and a gate electrode
95
e
is formed on the gate insulating film
95
d
; the gate electrode
95
e
faces the upper surface of the semiconductor layer
90
through the gate insulating film
95
d
. The gate insulating film
95
d
and the gate electrode
95
e
form a gate structure
95
.
A pair of impurity regions, or a drain
91
and a source
92
, are formed to the upper surface of the semiconductor layer
90
from its lower surface or main surface in contact with the insulator
82
. The drain
91
and the source
92
somewhat penetrate under the ends of the gate insulating film
95
d
and face each other through the body
90
a
, i.e. the semiconductor layer
90
under the gate insulating film
95
d
. For example, with an n-type SOIMISFET, the drain
91
and the source
92
are set to n
+
type and the body
90
a
is set to p
−
type.
The conventional SOIMISFET had the problem that the body
90
a
is in a floating state, which causes parasitic bipolar phenomenon and reduces the breakdown voltage between the source
92
and the drain
91
. This problem is described on and after page 426 in IEEE Trans. on Electron Devices Vol. 35, no. 4, April 1988 by K. K. Young, et al., for example.
This problem will now be briefly described with an n-type SOIMISFET. A passage of current between the source
92
and the drain
91
causes impact ionization in the drain
91
. Then holes take place and are accumulated in the body
90
a
in a floating state, which increases the potential at the body
90
a
. The potential rise in the body
90
a
turns on the npn-type parasitic bipolar transistor formed by the source
92
, body
90
a
and drain
91
, which causes feedback in which the current flowing between the source
92
and drain
91
increases. This deteriorates the breakdown voltage between the source
92
and drain
91
.
Furthermore, the floating-state body
90
a
also causes so-called 1/f noise due to the potential instability. This problem is described on and after page 99 in Y.-C. Tseng, et al. 1997 Symp. On VLSI Tech. Digest of Technical Paper, for example. The structure shown in
FIG. 41
has been regarded as unsuited for high-frequency analog devices because of the presence of the noise.
Meanwhile, SOIMISFETs having body potential drawing portions and ring-like gate structures have been suggested to avoid the floating state of the body
90
a
so as to improve the high-frequency characteristics, an example of which is shown in Japanese Patent Laying-Open No. 10-214971.
FIG. 42
is a plan showing the structure of an SOIMISFET having a ring-like gate structure; the section seen from the direction indicated by the arrows MM in the diagram corresponds to the sectional view of FIG.
41
.
In the plane view, the gate structure
95
has an octagonal closed-loop portion and a pair of extensions
96
each coupled to the closed-loop portion and to contact pad
97
. The drain
91
is surrounded by the closed-loop portion. Two pairs of sources
92
are provided outside the closed-loop portion; the sources
92
in each pair adjoin with an extension
96
therebetween. Body potential drawing portions
93
are each interposed between two sources
92
belonging to different pairs. The body potential fixing portions
93
are set to a different conductivity type from the drain
91
and the sources
92
; for example, they are set to p
+
-type in an n-type SOIMISFET.
The sources
92
and the body potential fixing portions
93
are surrounded by the element isolation portion
94
. The gate contact pads
97
, the drain
91
, the sources
92
, and the body potential fixing portions
93
have contacts
97
c
,
91
c
,
92
c
and
93
c
, respectively.
In the structure shown in
FIG. 42
, formation of the sources
92
and the body potential fixing portions
93
of different conductivity types requires ion implantation to be separately applied inside and outside the boundaries shown by the broken line. However, in practice, ions of different conductivity types do not always exclusively exist in the vicinity of the boundaries. When silicon is adopted as the semiconductor, cobalt silicide etc. is often formed on the boundaries between the sources
92
and the body potential fixing portions
93
. However, it is not easy to favorably perform the silicidation in areas where ions of different conductivity types are mixed. Even if the growth can be achieved, it may peel off.
Further, in the structure shown in
FIG. 42
, it is not desirable to apply the so-called partial trench isolation.
FIG. 44
is a sectional view showing a problem encountered when the partial trench isolation is applied to the structure shown in FIG.
42
. This diagram shows an example in which the gate structure
95
has sidewalls. In the partial trench isolation, isolation oxide films
98
are provided on the upper surface of the semiconductor layer
90
without making contact with the insulator
82
. The body
90
a
is connected to the semiconductor layer
90
b
under the isolation oxide film
98
on the right in the drawing through the source
92
, and is further connected to the body potential fixing portion
93
through the semiconductor layer
90
b.
This structure allows the ion implantation to be separately performed on the two sides of the isolation oxide film
98
to form the source
92
and the body potential fixing portion
93
of different conductivity types, and then it is possible to avoid formation of semiconductor region in which ions of different conductivity types are mixed. However, the source
92
form the pn junction J
1
with the body
90
a
and the pn junction J
2
with the semiconductor layer
90
b
. Since the pn junctions J
1
and J
2
are series-connected with opposite polarities in the path from the body
90
a
to the body potential fixing portion
93
, it is difficult to externally fix the potential in the body
90
a
via the body potential fixing portion
93
.
Referring to
FIG. 42
again, the structure can provide more favorable high-frequency characteristics as the extensions
96
are formed shorter.
FIG. 43
is a circuit diagram showing an example of an equivalent circuit of the SOIMISFET. When this circuit is adopted, the maximum oscillation frequency f
max
of the transistor can be given with the cur-off frequency f
T
as follows.
f
max
=
f
T
2
R
g
(
g
ds
+
2
π
f
T
C
gd
)
+
g
ds
(
R
i
+
R
s
)
f
T
=
g
m
2
π
(
C
gs
+
C
gd
)
Eq
.
1
Where R
i
, R
g
, R
s
, R
d
and R
ds
, are body resistance, gate resistance, source resistance, drain resistance and drain-source resistance, C
gs
, C
ds
, and C
gd
are gate-source capacitance, drain-source capacitance and gate-drain capacitance, and g
m
and g
ds
are transconductance and drain conductance, respectively.
The minimum noise figure F
min
can be given as follows.
F
min
=
1
+
2
π
fKC
gs
R
g
+
R
s
g
m
k
≈
2.5
Eq
.
2
As can be seen from the two equations above, decreasing the gate resistance R
g
improves the maximum oscillation frequency f
max
and the minimum noise
Komurasaki Hiroshi
Maeda Shigenobu
Yamamoto Kazuya
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