Semiconductor device having an SOI structure of mesa isolation t

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257354, 257386, H01L 2976, H01L 2994, H01L 31062, H01L 31113

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active

056635885

ABSTRACT:
A semiconductor device of SOI structure formed by the mesa isolation method, which can sufficiently reduce the wiring capacitance even if the width of the isolation trench is large. An SOI layer which constitutes an element region is formed by forming a buried oxide film in a silicon substrate, forming an isolation trench in the buried oxide film and burying an isolating material in the isolation trench. By the formation of the SOI layer with the isolating material, a dummy SOI layer is formed in a field part other than the element region. Then, by the formation of a MOSFET gate wiring on the dummy SOI layer, the wiring capacitance is reduced. Furthermore, the dummy SOI layer is completely depleted when the MOSFET threshold value is applied to the gate wiring.

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Haond, et al: "Lateral Isolation in SOI CMOS Technology", Solid State Technology, Jul. 1991: pp. 47-52.

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