Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
1998-08-11
2001-01-09
Saadat, Mahshid (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S647000, C257S750000, C257S762000, C257S764000
Reexamination Certificate
active
06172421
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to integrated circuits and fabrication techniques for forming a protective intermetallic layer on metal interconnect lines to prevent oxidation and electromigration.
BACKGROUND OF THE INVENTION
In semiconductor wafers utilizing multilayered circuits, damascene metal interconnect lines are used to conduct current through the layers. These interconnect lines were usually made of aluminum heretofore, but they are increasingly being made of copper.
Currently, semiconductor technology is moving away from the use of aluminum as the metal of choice in circuitry and toward the use of copper. This move toward the production of copper semiconductors is receiving intense research because copper conducts electricity with lower resistance than aluminum which results in increased microprocessor speed. Additionally, copper uses less power and costs less than aluminum. Also the physical attributes of copper metal allow for space-saving circuitry design. A discussion of the move toward copper can be found in The Electron, “Smokin . . . Watch Out, Fast Computers are on the way Speed is now Pushing Computing Power,” by Andy Maslowski, April/May/June 1998, Vol. 25, No. 2, pp. 1 and 20
. The Electron
is published at 4781 E. 355th St., Willoughby, Ohio 44094-4698.
In the formation of damascene copper intercornnect lines, a copper oxide layer sometimes forms at the surface of the interconnect line. This copper oxide layer presents several problems to further development of the circuit.
First, the oxidized layer is brittle causing poor adhesion to the next deposited layer in the fabrication process. This can lead to a circuit disconnect or reduced conductivity.
Second, during electrical testing, the fastest diffusion path occurs along the metal oxide layer. This enhances material transport under the applied electric current and increases the electromigration rate of the line.
Electromigration occurs in extended runs of metal lines carrying a high current. A brief discussion of electromigration can be found in a text entitled:
Microchip Fabrication, A Practical Guide to Semiconductor Processing
, 3rd Ed., by Peter Van Zant, McGraw-Hill, p. 392-393. As discussed in the foregoing reference, the current creates an electric field and a thermal gradient. The electric field decreases from the input side to the output side. The current also creates a thermal gradient which makes the metal more mobile. The effect is that the metal begins to diffuse in the direction of the gradients thus thinning the lead. The effect can continue until the line becomes so thin it separates from the input or forms an open circuit and the semiconductor chip fails. As this usually occurs over an extended period of operation, the failure is often seen by the end-user with commercial impact to the producer.
Third, the oxidized layer increases the sheet resistance of the metal in the interconnect. This results in increased resistance to current flow and a less efficient circuit.
Thus it is desirable to have a product and/or process which reduces or eliminates the metal oxide problem described above, especially as it impacts copper and copper oxidation problems, to increase the reliability and performance of the semiconductor circuitry.
BRIEF SUMMARY OF THE INVENTION
In accordance with the present invention, an intermetallic layer is formed on the surface of damascene metal interconnects during semiconductor fabrication. One goal or objective of the present invention is to diminish or eliminate a metal oxide layer that forms on the surface of damascene metal interconnects and form a protective intermetallic layer on the surface of damascene metal interconnects. This and other objectives of the present invention can be achieved by alternative approaches.
The first approach is used where the metal oxide layer is thin enough to be reduced by a deposited metal during formation of the intermetallic layer on the damascene metal interconnect. Such a metal oxide layer may be as thin as 20-50 Å, for example.
The second approach can be generally viewed as a two-step process. It is used where the metal oxide layer is too thick to be reduced by reaction with a deposited metal during the formation of the intermetallic layer. Such a metal oxide layer may be as thick as 50-200 Å, for example. Initially, the metal oxide layer is reduced by exposure to a reducing agent. Then, the intermetallic layer is formed by reaction of the metal interconnect surface with a deposited metal.
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Besser Paul Raymond
Gupta Subhash
Nogami Takeshi
Pramanick Shekhar
Advanced Micro Devices , Inc.
LaRiviere Grubman & Payne, LLP
Saadat Mahshid
Wilson Allan R.
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