Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2000-01-21
2002-09-03
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S750000, C257S762000, C257S774000
Reexamination Certificate
active
06445071
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a multi-layer interconnection structure, and a method of manufacturing such a device by using a damascene process.
2. Background Art
In a conventional semiconductor device having a multi-layer interconnection structure, a plurality of SiO
2
-based interlayer insulating films are laminated on a semiconductor substrate carrying integrated circuits formed thereon, and conductive leads or interconnections are formed in each interlayer insulating film or across the interlayer insulating films. In this case, vertical connections between the conductive leads in different interlayer insulating films are made by forming a through-hole in an interlayer insulating film between the two conductive leads, forming a plug by filling the through-hole with a metal, and connecting the both ends of the plug to the conductive leads above and underneath the plug.
Since conventional semiconductor devices are manufactured as described above, no conductive leads can be formed in the interlayer insulating film haven a through-hole and a plug, and the conductive leads are formed in the interlayer insulating films above and underneath the through-hole.
Therefore, the multi-layer interconnection structure is thickened, and the wafer is warped by the stress of the interlayer insulating films or the like, arising problems of erroneous sucking of wafers during the wafer processing, or defocusing during photoengraving.
SUMMARY OF THE INVENTION
The present invention is conceived in order to solve such problems, and the object of the present invention is to provide a semiconductor device having a multi-layer interconnection structure which realizes thinner interconnecting structure, reduces the area required for interconnection, lowers interconnection capacity, and forms a capacity element without voltage dependency. Further object of the present invention is to provide a method for forming an increased number of conductive leads or interconnections by using fewer process steps.
According to one aspect of the present invention, a semiconductor device, having a multi-layer interconnection structure, comprises a semiconductor substrate and a plurality of interlayer insulating films formed on the semiconductor substrate. A plurality of conductive leads are formed in the interlayer insulating films. Further, at least one conductive plug is formed in at least one of the interlayer insulating films having at least one conductive lead, and the conductive plug connects at least a pair of conductive leads in the different interlayer insulating films.
According to another aspect of the present invention, a semiconductor device, having a multi-layer interconnection structure, comprises a semiconductor substrate and a plurality of interlayer insulating films formed on the semiconductor substrate. A plurality of conductive leads are formed in the interlayer insulating films. Further, at least a pair of adjacent conductive leads, which are formed in an adjacent interlayer insulating films, are connected together to form a unified thick conductive lead.
According to another aspect of the present invention, a semiconductor device, having a multi-layer interconnection structure, comprises a semiconductor substrate and a plurality of interlayer insulating films formed on the semiconductor substrate. At least a dielectric film is formed between the adjacent interlayer insulating films. A plurality of conductive leads are formed in the interlayer insulating films. Further, at least a pair of conductive leads are formed in the interlayer insulating films adjacent to the dielectric film, and the pair of conductive leads are formed at opposite position to form a capacity element.
According to another aspect of the present invention, in a method of manufacturing a semiconductor device having a multi-layer interconnection structure, a conductive lead and a conductive plug connecting a pair of other conductive leads in the different interlayer insulating film are formed in one of the interlayer insulating films.
According to still another aspect of the present invention, in a method of manufacturing a semiconductor device having a multi-layer interconnection structure, one conductive lead is formed in an interlayer insulating film, and the other conductive lead is formed above the one conductive leads in an upper adjacent inter layer insulating film, and the two conductive leads are joined together to form a thick unified conductive lead.
According to further aspect of the present invention, in a method of manufacturing a semiconductor device having a multi-layer interconnection structure, a dielectric film is formed between a pair of interlayer insulating film, and a pair of conductive leads are formed in the interlayer insulating films to sandwich the dielectric film to form a capacitor element.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
REFERENCES:
patent: 5512514 (1996-04-01), Lee
patent: 5578861 (1996-11-01), Kinoshita et al.
patent: 5834845 (1998-11-01), Stolmeijer
patent: 5886410 (1999-03-01), Chiang et al.
patent: 5990507 (1999-11-01), Mochizuki et al.
patent: 6018195 (2000-01-01), Takebuchi
patent: 6071809 (2000-06-01), Zhao
patent: 06125180 (1994-05-01), None
patent: 10-289984 (1998-10-01), None
Amishiro Hiroyuki
Harada Akihiko
Haruhana Hideyo
Chu Chris C
Lee Eddie
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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