Semiconductor device having an improved capacitor structure,...

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

Reexamination Certificate

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C438S253000, C438S254000

Reexamination Certificate

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06211036

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a capacitor used for a semiconductor device, such as DRAM or SRAM, and more particularly relates to a hollow capacitor and a manufacturing method therefor and further relates a semiconductor device including such capacitor.
2. Background Art
In a semiconductor device utilizing a capacitor, an increase in electrostatic capacitance is usually very important for ensuring the data-retaining characteristics of the semiconductor device. However, as semiconductor devices become progressively miniaturized, the capacitor itself is also miniaturized, thereby resulting in a decrease in the electrostatic capacitance of the capacitor.
DRAM is a representative semiconductor device utilizing such a capacitor. A capacitor having a high electrostatic capacitance has been developed for use in DRAM. A so-called cylindrical capacitor having a cylindrical electrode at one end has been conventionally used as such a capacitor having a high electrostatic capacitance. However, in the cylindrical capacitor, a thick conductive film is formed through deposition, thus increasing an absolute step between a memory cell region and a peripheral region. Such a large absolute step considerably interrupts the shape of a wiring layer and hinders miniaturization of the semiconductor device.
For these reasons, a hollow capacitor has recently been developed as a new capacitor structure. In such a hollow capacitor, one of capacitor electrodes is formed into a hollow configuration, and a dielectric film is provided on the surface of the electrode, and other electrode is disposed to face the one electrode via the dielectric film therebetween.
Such a hollow capacitor employs an oxide film as a dummy pattern to be used in forming one capacitor electrode into a hollow configuration (as disclosed in, e.g., Japanese Patent Application Laid-open Nos. 4-39964 and 9-213906 and U.S. Pat. No. 5,095,346). Isotropic etching is commonly used for removing the oxide film serving as a dummy pattern.
FIG. 11
is a cross-sectional view showing a DRAM memory cell as one example of a semiconductor device utilizing a conventional hollow capacitor.
In the drawing, reference numeral
1
designates a hollow capacitor;
2
a designates a silicon oxide film as an interlayer insulating film,
3
designates a storage node contact;
4
designates a transfer gate;
5
designates a gate electrode of the transfer gate
4
;
6
designates a bit line contact; and
7
designates a bit line.
In the conventional hollow capacitor
1
, an oxide film is used as a dummy pattern for forming a hollow configuration. When the oxide film is formed through isotropic etching, an oxide film, which is used as an underlying interlayer insulating film for the hollow capacitor formed on the dummy pattern, is inevitably etched away. Accordingly, the interlayer insulating film becomes thinner, thereby resulting in a risk of a short circuit arising between the electrode of the hollow capacitor
1
and the bit line
7
.
FIG. 12
is a cross-sectional view showing a high-resistance SRAM memory cell having a storage node and a hollow capacitor formed for the storage node.
In the drawing, reference numeral
11
designates a substrate;
12
designates an access transistor;
13
designates a driver transistor;
15
designates a hollow capacitor;
16
designates load resistor;
17
designates a Vcc wiring pattern;
18
designates a GND line; and
19
designates a bit line.
As a result of presence of the hollow capacitor
15
, the electrostatic capacitance of the storage node is increased, thereby improving the resistance of the memory cell to soft-error failures. However, the capacitor
15
is formed on a shared direct contact, so that the complete removal of the oxide film
2
b
staying at the shared direct contact section within a short period of time is considerably difficult. The oxide film can be completely removed, so long as the time required for removing the film (i.e., a processing time) is extended. However, the processing time cannot be extended for fear that an oxide film serving as an interlayer insulating film may be damaged.
In a conventional hollow capacitor such as that described above, an interlayer insulating film existing below the capacitor is usually an oxide film and may be substantially damaged during removal of the oxide film at the time of formation of a hollow structure. In some cases, there arises a chance of a short circuit arising between the gate electrode and the capacitor. Even if removal of an oxide film does not result in a short circuit, the flatness of the interlayer insulating film will be interrupted. This in turn distorts the shape of a film to be formed on the interlayer insulating film.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve such a problem of the conventional art, and the object of the present invention is to provide a capacitor, particularly a hollow capacitor, which does not damage an oxide film serving as an interlayer insulating film. Other objects of the present invention are to provide a manufacturing method therefor, and a semiconductor device having such improved hollow capacitor.
According to one embodiment of the present invention, a semiconductor device comprises an interlayer insulation film formed on the semiconductor substrate and a capacitor formed on the interlayer insulation film. The capacitor includes a first electrode, a second electrode facing the first electrode, and a thin dielectric film formed therebetween. The first electrode has at least one hollow structure formed by removal of a nitride film filling the hollow structure. The thin dielectric film is formed on the surface of the first electrode including the surface of the hollow structure. Further, the second electrode is formed on the dielectric film facing the first electrode and filling the hollow structure.
According to another embodiment of the present invention, in a method of manufacturing a semiconductor device, an interlayer insulation film is formed on a semiconductor substrate. A nitride film is grow and patterned on the interlayer insulation film. A first conductive film is grow and patterned on the nitride film. A first electrode is formed to have hollow structure by selectively removing the nitride film by means of isotropic etching. A thin dielectric film is grown on the surface of the first electrode including the surface of the hollow structure. Further, a second conductive film is grow and patterned on the thin insulating film filling the hollow structure, and thus a second electrode is formed.
In another aspect of the present invention, in a method of manufacturing a semiconductor device, a process of growing and patterning a nitride film on a first conductive film, and a process of growing and patterning a first conductive film on the nitride film is repeated. Thereby, a first electrode having plurality hollow structures is formed. Thereafter, a thin dielectric film is grown on the surface of the first electrode including the surface of the hollow structures. Further, a second conductive film is grown and patterned on the thin insulating film filling the hollow structures, thereby a second electrode is formed.
Other and further objects, features and advantages of the invention will appear more fully from the following description.


REFERENCES:
patent: 5049957 (1991-09-01), Inoue et al.
patent: 5095346 (1992-03-01), Bae et al.
patent: 5236859 (1993-08-01), Bae et al.
patent: 5262663 (1993-11-01), Rho et al.
patent: 4-39964 (1992-02-01), None
patent: 5-251657 (1993-09-01), None
patent: 9-213906 (1997-08-01), None
“A 0.4um Gate-All-Around TFT (GAT) Using a Dummy Nitride Pattern for High Density Memories”, by Maegawa et al., SSDM '94, The Japan Society of Applied Physics, pp. 907-909.

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