Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated – With specified encapsulant
Reexamination Certificate
2000-01-14
2003-09-16
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
With specified encapsulant
C257S787000, C257S789000, C257S782000, C257S783000, C257S795000, C257S690000, C257S790000, C257S791000
Reexamination Certificate
active
06621173
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to semiconductor devices. More particularly, this invention relates to semiconductor devices in which the semiconductor chip is bonded by adhesive to a chip attachment element and at least a portion of the member that electrically connects said chip with the interconnects on said chip attachment element is sealed or embedded with a sealant/filling agent.
BACKGROUND OF THE INVENTION
Japanese Patent Application Laid Open (PCT) Numbers Hei 6-504408 (504,408/1994) and Hei 8-504063 (504,063/1996) teach semiconductor devices in which the semiconductor chip is bonded by an adhesive to a chip attachment element and at least a portion of the member that electrically connects said chip with the interconnects on said chip attachment element is sealed or embedded with a sealant/filling agent.
While semiconductor devices of this type are characterized by their potential for miniaturization and by a relatively good resistance to thermal shock, additional improvements in their thermal shock resistance are nevertheless necessary.
SUMMARY OF THE INVENTION
The inventors achieved the present invention as a result of extensive investigations into the problems discussed above.
In specific terms, the object of the present invention is to provide a semiconductor device that has an excellent resistance to thermal shock.
The present invention is directed to a semiconductor device, comprising: a semiconductor chip; a semiconductor chip attachment element facing the semiconductor chip, at least one interconnect on the surface of the semiconductor chip attachment element; and at least one member consisting of a metal or metal alloy that electrically connects the semiconductor chip with the interconnects; wherein the semiconductor chip is bonded to the semiconductor chip attachment element by an adhesive and at least a portion of at least one member that electrically connects the semiconductor chip with at least one interconnect is sealed or imbedded with a sealant/filling agent, and the complex modulus of at least one of the adhesive and the sealant/filling agent is not greater than 1×10
8
Pa at −65° C. and a shear frequency of 10 Hz.
REFERENCES:
patent: 4812897 (1989-03-01), Narita et al.
patent: 4933744 (1990-06-01), Segawa et al.
patent: 5043793 (1991-08-01), Gootzen et al.
patent: 5171716 (1992-12-01), Cagan et al.
patent: 5324888 (1994-06-01), Tyler et al.
patent: 5349240 (1994-09-01), Narita et al.
patent: 5629566 (1997-05-01), Doi et al.
patent: 5959362 (1999-09-01), Yoshino
patent: 6265782 (2001-07-01), Yamamoto et al.
patent: 0 469 614 (1992-02-01), None
patent: 6-504408 (1994-05-01), None
patent: 8-504063 (1996-04-01), None
patent: WO 92/05582 (1992-04-01), None
patent: WO 95/08856 (1995-03-01), None
Isshiki Minoru
Mine Katsutoshi
Otani Yoshiko
Yamakawa Kimio
Brown Catherine U.
Dow Corning Toray Silicone Co. Ltd.
Milco Larry A.
Parekh Nitin
Thomas Tom
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