Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1992-02-26
1994-08-23
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257750, 257751, 257763, 257765, 257758, 257759, 257767, 257770, 257774, H01L 2348, H01L 2946, H01L 2954, H01L 2962
Patent
active
053410262
ABSTRACT:
A semiconductor integrated circuit device has an interconnection structure in which multilayer aluminum interconnection layers are connected through connection holes. A first aluminum interconnection layer is formed on a main surface of the semiconductor substrate. The first aluminum interconnection layer has a surface layer which includes any of high melting point metal, high melting point metal compound, high melting point metal silicide, or amorphous silicon. An insulating layer is formed on the first aluminum interconnection layer, and has a through hole if formed extending to a surface of the first aluminum interconnection layer. A second aluminum interconnection layer is formed on the insulating layer and is electrically connected to the surface layer of the first aluminum interconnection layer through the through hole. The second aluminum interconnection layer includes a titanium layer, a titanium nitride layer and an aluminum alloy layer. The titanium layer is formed on the insulating layer to be in contact with the surface of the first aluminum interconnection layer through the through hole. The titanium nitride layer is formed on the titanium layer. The aluminum alloy layer is formed on the titanium nitride layer. An electrical contact resistance between the first and second aluminum interconnection layers is stabilized, and resistance against the electron-migration and stress-migration is improved in the interconnection structure.
REFERENCES:
patent: 4556897 (1985-12-01), Yorikane et al.
"High Performance Multilevel Interconnection System with Stacked Interlayer Dielectrics by Plasma CVD and Bias Sputtering", Abe et al., Jun. 12-13, 1989 VMIC Conference, 1989 IEEE, pp. 404-410.
"A New Reliability Problem Associated with Ar Ion Sputter Cleaning of Interconnect Vias", Tomioka et al., 1989 IEEE/IRPS, pp. 53-58.
"Comparison of Electromigration Phenomenon Between Aluminum Interconnection of Various Multilayers Materials", Fujii et al., Jun. 12-13, 1989 VMIC Conference, 1989 IEEE, pp. 477-483.
"VLSI Electronics Microstructure Science", vol. 15, 1987, Edited by Norman G. Einspruch, pp. 304-305.
Hagi Kimio
Harada Shigeru
Ishimaru Kazuhiro
Crane Sara W.
Jr. Carl Whitehead
Mitsubishi Denki & Kabushiki Kaisha
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