Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2002-04-15
2003-05-20
Whitehead, Jr., Carl (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
Reexamination Certificate
active
06566678
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a solid-state image sensor.
2. Description of the Background Art
Recently, a type of solid-state image sensor which uses an amplification-type sensor is suggested. This type of device is characterized in that the light signal detected in the photoelectric conversion storage portion is amplified in the close vicinity of the photoelectric conversion storage portion.
FIG. 9
is a diagram showing the circuit configuration of a semiconductor device having a CMOS (Complementary Metal Oxide Semiconductor) type image sensor as a solid-state image sensor. As shown in
FIG. 9
, unit pixels or unit cells, C, are arranged in a matrix, where the individual cells C are connected to a vertical shift register VS and a horizontal shift register HS.
Each unit cell C has a photodiode PD, a transfer switch M
1
, a reset switch M
2
, an amplifier M
3
, and a select switch M
4
. The photodiode PD serves as the photoelectric conversion storage portion which converts the incident light into an electric signal and stores the generated charge. The transfer switch M
1
serves to transfer the converted electric signal to the amplifier M
3
; the transfer switch M
1
is controlled by signal from the vertical shift register VS. The reset switch M
2
serves to reset the signal charge and the amplifier M
3
serves to amplify the electric signal.
The transfer switch M
1
, the reset switch M
2
, the amplifier M
3
, and the select switch M
4
are each formed of an MOS transistor.
FIG. 10
is a top view which specifically shows the structure of the region R shown in FIG.
9
.
FIG. 11
is the cross-sectional view taken along the line XI—XI in FIG.
10
.
As shown in
FIGS. 10 and 11
, an element isolation insulating layer
103
is formed by LOCOS (Local Oxidation of Silicon) in the surface of a P-type semiconductor substrate
102
. The photodiode PD, the transfer switch M
1
, and the reset switch M
2
are closely arranged in the surface of the P-type semiconductor substrate
102
.
The photodiode PD is formed of a PN junction between the P-type semiconductor substrate
102
and an N-type impurity region (an N-type active region)
104
. A P-type impurity region (a P-type active region)
105
is formed over the N-type impurity region
104
(or in the vicinity of the surface of the P-type semiconductor substrate
102
). This P-type impurity region
105
is formed to such a depth that the depletion layer at the PN junction between the P-type semiconductor substrate
102
and the N-type impurity region
104
will not reach it. The role of the P-type impurity region
105
will be described later.
The transfer switch M
1
has an N-type source region
104
, an N-type drain region
106
a
(an N-type active region, which is shown as FD (Floating Diffusion) since it may come in a floating state during operation), and a gate electrode layer
108
a
. The N-type source region
104
and the N-type drain region
106
a
are formed at a certain distance in the surface of the P-type semiconductor substrate
102
. The gate electrode layer
108
a
is formed on the surface of the P-type semiconductor substrate
102
in the part interposed between the N-type source region
104
and the N-type drain region
106
a
, with a gate insulating layer
107
provided therebetween. The N-type impurity region
104
of the photodiode PD and the N-type source region
104
of the transfer switch M
1
are the same region, though they were separately referred to as parts of different components.
The reset switch M
2
has a pair of N-type source/drain regions
106
a
and a gate electrode layer
108
b
. The pair of N-type source/drain regions
106
a
are spaced at a certain distance in the surface of the semiconductor substrate
102
. The gate electrode layer
108
b
is formed on the region between the pair of N-type source/drain regions
106
a
with a gate insulating layer (not shown) interposed therebetween. The N-type drain region
106
a
of the transfer switch M
1
and one of the N-type source/drain regions
106
a
of the reset switch M
2
are the same region, though they were separately referred to as parts of different components.
In the CMOS type image sensor shown in
FIGS. 10 and 11
, the charge generated in the photodiode PD is transferred to the N-type drain region
106
a
through a channel formed in the surface of the P-type semiconductor substrate
102
right under the gate insulating layer
107
of the transfer switch M
1
.
In the surface of the P-type semiconductor substrate
102
, the area near the edges of the element isolation insulating layer
103
is susceptible to defects caused by stresses produced by formation of the element isolation insulating layer
103
. Also, when the gate electrode layer
108
a
is formed by etching, the etching may damage the surface of the P-type semiconductor substrate
102
and cause defects. Furthermore, impurity implantation for forming the active regions, e.g. the N-type drain region
106
a
, is also likely to damage the surface of the P-type semiconductor substrate
102
and cause defects.
Thus part of the signal charge generated in the photodiode PD flows through the defects to cause a leakage current. The leakage current reduces the amount of charge transferred to the N-type drain region
106
a
, which reduces the sensitivity of the solid-state image sensor and deteriorates the characteristics of the pixels.
The P-type impurity region
105
is formed for the purpose of suppressing such leakage current. That is to say, even when defects are present in the vicinity of the surface of the P-type semiconductor substrate
102
, the presence of the P-type impurity region
105
causes a PN-junction depletion layer to form between the P-type impurity region
105
and the N-type impurity region
104
, which isolates the charge storage region in the N-type impurity region
104
from the defects, thereby preventing the charge generated in the photodiode PD from being taken into the defects. The leakage current caused by defects can thus be suppressed.
However, the formation of the P-type impurity region
105
alone cannot sufficiently suppress the leakage current. As stated above, in the surface of the P-type semiconductor substrate
102
, defects are likely to be caused not only in the photodiode PD, but also in the vicinities of the edges of the element isolation insulating layer
103
and in the vicinity of the channel layer. Therefore leakage current may occur through defects formed in these portions.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device having a solid-state image sensor with reduced leakage current.
According to the present invention, a semiconductor device includes: a semiconductor substrate of a first conductivity type; a first active region; a second active region; a control electrode; and a buried channel layer. The first active region is provided in a surface of the semiconductor substrate and has a second conductivity type which is different from the first conductivity type. The second active region is provided in the surface of the semiconductor substrate at a distance from the first active region and has the second conductivity type. The control electrode is provided on the surface of the semiconductor substrate in a part interposed between the first and second active regions. The buried channel layer is provided in the semiconductor substrate under the control electrode and has the second conductivity type. Further, the buried channel layer is in contact with both of the first and second active regions. The semiconductor substrate and the first active region constitute a photodiode which is part of a solid-state image sensor. The control electrode and the first and second active regions constitute a transistor which is part of the solid-state image sensor. Further, the buried channel layer has a lower impurity concentration than the first and second active regions.
According to the present invention, the semiconductor device
Maeda Atsushi
Sakakibara Kiyohiko
Huynh Yennhu B.
Jr. Carl Whitehead
Mitsubishi Denki & Kabushiki Kaisha
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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