Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2006-01-31
2009-10-20
Vu, Hung (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S664000, C438S682000, C438S683000
Reexamination Certificate
active
07605068
ABSTRACT:
Provided is a semiconductor device and a manufacturing method thereof. The method includes the steps of: forming a thin film transistor including a substrate having a semiconductor layer and silicon, a gate insulation layer formed on the semiconductor layer, a gate electrode formed on the gate insulation layer, and source and drain regions formed in the semiconductor layer; forming a first metal layer on the substrate having the semiconductor layer and the gate electrode; forming a second metal layer on the first metal layer; forming a third metal layer on the second metal layer; forming a nitride layer on the third metal layer; and annealing the substrate having the nitride layer, and forming a silicide layer on the gate electrode and the source and drain regions.
REFERENCES:
patent: 5840626 (1998-11-01), Ohguro
patent: 5970370 (1999-10-01), Besser et al.
patent: 6121139 (2000-09-01), Chang et al.
patent: 6329276 (2001-12-01), Ku et al.
patent: 6339021 (2002-01-01), Tan et al.
patent: 6873051 (2005-03-01), Paton et al.
patent: 2004/0203229 (2004-10-01), Fang et al.
patent: 10-284732 (1998-10-01), None
patent: 1020040002003 (2004-01-01), None
Yong-Jin Kim et al., “The Effect of Triple Capping Layer (Ti/Ni/TiN0 on the Electrical and Structural Properties of Nickel Monosilicide” Journal of the Electrochemical Society, 153 (1) G35-G38 (Nov. 10, 2005) 0013-4651/2005/153(1)/G35/4 The Electrochemical Society, Inc. (pp. G35-G38).
Choi Chel Jong
Kim Yong Jin
Lee Hi Deok
Blakely , Sokoloff, Taylor & Zafman LLP
Electronics and Telecommunications Research Institute
Vu Hung
LandOfFree
Semiconductor device having a silicide layer and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having a silicide layer and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having a silicide layer and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4088667