Semiconductor device having a pseudo power supply wiring

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S027000, C326S033000, C326S121000, C327S544000

Reexamination Certificate

active

07541839

ABSTRACT:
A semiconductor device including an AND-NOR composite gate of which AND unit is supplied with input signals IN and VDD and NOR unit is supplied with an inverted signal EB of an enable signal E, and an AND-NOR composite gate of which AND unit is supplied with an input signal INB and an enable signal E and NOR unit is supplied with VSS. These gates are inserted into a path to which the input signals IN and INB are supplied. Thereby, a symmetric property of a complimentary signal can be retained. Further, outputs of the AND-NOR composite gates are fixed irrespective of a logical level of the enable signal E. Thus, a sub-threshold current also is inhibited.

REFERENCES:
patent: 6169419 (2001-01-01), De et al.
patent: 6208171 (2001-03-01), Kumagai et al.
patent: 2002/0005732 (2002-01-01), Yokomizo
patent: 2002/0079927 (2002-06-01), Katoh et al.
patent: 2006/0267633 (2006-11-01), King
patent: 2007/0176673 (2007-08-01), Ito
patent: 2000-13215 (2000-01-01), None
patent: 2000-048568 (2000-02-01), None

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