Semiconductor device having a programmable memory cell

Details Semiconductor device having a programmable memory cell Semiconductor device having a programmable memory cell

1994-04-22

1995-11-28

Clawson, Jr., Joseph E.

Static information storage and retrieval

Systems using particular element

Semiconductive

365182, 257133, 257374, 257378, 257379, 257386, 257399, 257585, G11C 1140

Patent

active

054714192

ABSTRACT:
A semiconductor device having a programmable memory cell which includes a bipolar transistor of which a base region (13) can be provided with a base current through a control transistor (7, 8, 9, 10). The bipolar transistor has an emitter region (12) connected to a first supply line (151) and has a collector region (14) connected to a second supply line (152) through a load (16). A constant potential difference is maintained between the two supply lines (151, 152) during operation. The collector region (14) is laterally electrically insulated and provides a feedback to the control transistor in such a manner that, during operation within a certain voltage domain, a change in the voltage difference between the emitter region (12) and the collector region (14) leads to an opposite change in the conductivity through the control transistor.

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I. Ho et al., "High Speed, High Density, Bipolar Random-Access Memory." IBM Tech. Discl. Bull., vol. 21 #4, Jun. 1978, pp. 195-197.
Technical Digest of International Devices Metting 1988, pp. 44-47 K. Sakui et al., "A New Static Memory Cell Based on Reverse Base Current (RBC) Effect on Bipolar Transistor".

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