Semiconductor device having a nonvolatile memory cell in which t

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257315, H01L 2976

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active

058280995

ABSTRACT:
An (E)EPROM is provided in which information is written with hot electrons generated in the channel current at the source side of the channel instead of at the drain side, as is usual. To obtain the electric field distribution in the channel 6 necessary for this, the gate oxide 10 is provided with a thickened portion 13 adjacent the source zone 4 so that locally a strong lateral electric field is induced in the channel at higher gate voltages. An efficient charge transport of electrons to the floating gate 9 is obtained through this lateral electric field in the channel and the comparatively high electric field in the gate oxide. The thickened portion of the gate oxide may be obtained in a simple manner through thermal oxidation. To prevent the formation of strong fields at the drain side of the channel, the drain is preferably provided with an LDD structure 5a which adjoins the gate oxide. As a result, Fowler-Nordheim tunnelling through this thin gate oxide may also be used for erasing.

REFERENCES:
patent: 4577295 (1986-03-01), Eitan et al.
patent: 4769340 (1988-09-01), Chang et al.
patent: 5019879 (1991-05-01), Chiu
patent: 5036375 (1991-07-01), Mitchell
patent: 5200636 (1993-04-01), Uemura et al.
patent: 5270980 (1993-12-01), Pathak et al.
patent: 5274588 (1993-12-01), Manzur et al.
patent: 5284784 (1994-02-01), Manley
patent: 5294819 (1994-03-01), Simko
patent: 5326999 (1994-07-01), Kime et al.
patent: 5394360 (1995-02-01), Fukumoto
patent: 5404037 (1995-04-01), Manley
patent: 5432740 (1995-07-01), D'Arrigo et al.
patent: 5506436 (1996-04-01), Hayashi et al.
patent: 5552621 (1996-09-01), Kowalski
Muller et al., Device Electronics for Integrated Circuit, "MOS Memory", pp. 459-454, 1986.
Ning et al., IBM Technical Disclosure Bulletin, "Self-Aligned Stack-Gate IGFET Device having an Underlying PN Junction for Charge Injection", vol. 21 No. 1, p. 402, Jun. 1978.
"A source-side injection erasable programmable read-only memory (SI-EPROM) device" by Wu et al., published in IEEE Electron Device Letters, vol. EDL-7, No. 9, Sep. 1986, pp. 540-542.

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