Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-06-25
2000-11-28
Tsai, Jey
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438624, 438634, 438637, 438638, 438666, 438687, H01L 214763
Patent
active
061535117
ABSTRACT:
A method of making a semiconductor device has a multilayer interconnection structure including a lower organic interlayer insulation film, an etching stopper film on the lower interlayer insulation film and an upper organic interlayer insulation film covering the etching stopper film, wherein the upper organic interlayer insulation film is covered by first and second etching stopper films of respective, different compositions.
REFERENCES:
patent: 5539255 (1996-07-01), Cronin
patent: 5635423 (1997-06-01), Huang et al.
patent: 5663101 (1997-09-01), Cronin
patent: 5877075 (1999-03-01), Dai et al.
patent: 5882996 (1999-03-01), Dai
patent: 5916823 (1999-06-01), Lou et al.
patent: 5935762 (1999-08-01), Dai et al.
patent: 5960254 (1999-09-01), Cronin
patent: 6051508 (2000-04-01), Takase et al.
patent: 6054379 (2000-04-01), Yau et al.
patent: 6060380 (2000-05-01), Subramanian et al.
patent: 6071809 (2000-06-01), Zhao
patent: 6072227 (2000-06-01), Yau et al.
patent: 6074942 (2000-06-01), Lou
Fujitsu Limited
Gurley Lynne A.
Tsai Jey
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