Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-06-28
2002-09-24
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S532000, C257S306000
Reexamination Certificate
active
06455882
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a semiconductor device having a hydrogen barrier layer and, more particularly, to a structure suited for a consolidated LSI including a logic circuit section and a FeRAM section.
(b) Description of the Related Art
Consolidated LSIs having a logic circuit and a nonvolatile memory device integrated on a single chip are known in this art. Conventionally, the nonvolatile memory device is implemented by an EEPROM; however, a FeRAM device having a ferroelectric capacitor in each memory cell is recently used as the nonvolatile memory device due to the superior characteristics thereof such as a higher read/write speed, a lower power dissipation and a larger number of repetitive rewrite operations. The FeRAM device generally includes a FeRAM cell array and a peripheral circuit including a sense amplifier block and a decoder block, and the logic circuit operates for data processing and for conducting read/write operations in association with the peripheral circuit.
In fabrication of MOSFETs which constitute the logic circuit section in the consolidated LSI, a hydrogen-annealing step is conducted to the wafer for several tens of minutes at a temperature of about 400 to 450° C. in a hydrogen ambient containing several percents to fifty percents hydrogen. The hydrogen annealing step is conducted for the purpose of finally adjusting the transistor characteristics such as the interface state of the gate electrode, fixed electric charge, ON-current and threshold of the MOSFET. The hydrogen-annealing step is generally conducted after fabrication of the metallic interconnect structure and before formation of the passivation film.
In the FeRAM section in the consolidated LSI, it is known that the ferroelectric capacitor having a ferroelectric film including a perovskite metal oxide such as PZT or BST is liable to desorption of oxygen from the ferroelectric film in a reducing ambient of the hydrogen-annealing. The desorption of oxygen degrades the capacitor characteristics and thus is undesirable.
It is known that the desorption of oxygen is also incurred by a CVD process for depositing a tungsten film in the interconnect structure or a plasma-enhanced CVD process for depositing a silicon oxide film as an interlayer dielectric film. This is because these CVD steps also generate hydrogen similarly to the hydrogen-annealing step, and therefore provides similar adverse effects to the ferroelectric film.
In view of the above, a nitrogen-annealing step is conducted instead of the hydrogen-annealing in the fabrication process for the consolidated LSI having a FeRAM section and a logic circuit section. The nitrogen-annealing process, however, is inferior to the hydrogen-annealing process in terms of the ability for alleviating the damages of the transistor characteristics.
Another process is also studied wherein the hydrogen-annealing process is conducted to the logic circuit section and the peripheral circuit in the FeRAM section after covering the FeRAM cell array by a hydrogen barrier layer. The term “hydrogen barrier layer” as used herein means a film that does not allow hydrogen to penetrate therethrough, such as a film made of a hydrogen-containing metal or a metallic film having a barrier property against hydrogen.
Known examples of a hydrogen barrier layer include a plasma CVD SiN film deposited by a plasma-enhanced CVD process using SiH
4
and NH
3
at a temperature of about 400° C., a SiN film deposited by a thermal CVD process, a TiO
2
film deposited by sputtering at a temperature of 100° C. to 200° C., and a metal nitride film having an electric conductivity, such as TiN or AlN film, deposited by sputtering at a temperature of 100° C. to 200° C.
The known hydrogen barrier layers have the following problems:
The plasma CVD SiN film has inherently a higher hydrogen content ranging 20 and 25 atomic percents due to residual hydrogen. This incurs a reducing reaction in the ferroelectric film by the residual hydrogen. In addition, the plasma CVD SiN film has a higher permeability for water, and thus the water penetrating through the plasma CVD SiN film and an overlying film degrades the transistor characteristics. Moreover, the plasma CVD SiN film generates a large stress acting on the ferroelectric film ranging between a tensile stress of 2×10
9
dyne/cm
2
and a compressive stress of 5×10
9
dyne/cm
2
, which stress degrades the capacitor characteristics due to the degraded characteristics of the ferroelectric film. Furthermore, the plasma CVD SiN film has a poor affinity with respect to an O
3
-TEOS (tetraethylorthosilicate) SiO
2
film.
The thermal CVD process for depositing a SiN film involves a higher temperature for deposition, which provides adverse effects to the ferroelectric film in the capacitor.
The TiO
2
film is liable to a reduction reaction due to the hydrogen to change the film property thereof, thereby losing the hydrogen barrier property, although it does not allow ingress of hydrogen, thus has no residual hydrogen therein, has a lower permeability for water and generates a lower stress during the heat treatment.
The conductive metal nitride film, such as TiN or AlN film, has advantages in that it does not allow ingress of hydrogen and thus has no residual hydrogen and a lower permeability for water. However, the conductive metal nitride film generates a larger stress during the heat treatment, and also has limited uses due to the electric conductive property itself. For example, the metal nitride film is not applicable for covering the capacitor as a whole because a short circuit failure may arise due to the electric conductive property.
A ferroelectric film such as PZT or SBT is also proposed for implementing the hydrogen barrier layer. However, upon ingress of hydrogen, the barrier property of the ferroelectric film, wherein the ferroelectric film itself is subjected to reduction by the hydrogen, incurs generation of water which is undesirable.
In short, the conventional hydrogen barrier layers are not satisfactory in fabrication of the consolidated LSI having a FeRAM section and a logic circuit section. This also applies to a LSI having a ferroelectric capacitor including a ferroelectric film or a LSI having a component liable to degradation of characteristics thereof caused by a reduction reaction by hydrogen.
Thus, it has been desired to form a hydrogen barrier layer having a suitable hydrogen barrier property.
SUMMARY OF THE INVENTION
In view of the above, it is an object of the present invention to provide a semiconductor device including a hydrogen barrier layer having an excellent hydrogen barrier property.
It is noticed by the present inventor that a SiON film, especially formed by a plasma CVD process, has an excellent hydrogen barrier property, a lower hydrogen content, and a lower permeability for water, and generates less stress upon ids change of the ambient temperature.
Based on the above findings, the present invention provides a semiconductor device including a substrate, first and second circuit sections having specific functions and disposed separately on the substrate, and a hydrogen barrier layer covering the first circuit section while exposing the second circuit section, the hydrogen barrier layer including SiON.
In accordance with the present invention, the SiON film constituting the hydrogen barrier layer protects the circuit components in the first circuit section during a hydrogen-annealing process for the second circuit section in the fabrication process for the semiconductor device. The damages in the first circuit section due to the hydrogen-annealing process can be effectively prevented by the superior hydrogen barrier property of the SiON film.
The above and other objects, features and advantages of the present invention will be more apparent from the following description, referring to the accompanying drawings.
REFERENCES:
patent: 5504041 (1996-04-01), Summerfelt
patent: 5624864 (1997-04-01), Arita et al.
patent: 6249014 (2001-06-01), Baile
Loke Steven
Nguyen Cuong Quang
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