Semiconductor device having a filling pattern around a...

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Groove

Reexamination Certificate

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C257S758000

Reexamination Certificate

active

07825496

ABSTRACT:
A semiconductor device includes an interlayer insulating layer on a semiconductor substrate, at least one plug on the semiconductor substrate, the plug extending through the interlayer insulating layer toward an upper portion of the semiconductor substrate, the plug having a lower part with a first diameter and an upper part with a second diameter different from the first diameter, a filling pattern on the interlayer insulating layer, the filling pattern surrounding the upper part of the plug, and an upper surface of the filling pattern being substantially coplanar with an upper surface of the plug, the upper surface of the plug facing away from the semiconductor substrate, and a protection pattern on the upper part of the plug, the protection pattern being between the plug, the filling pattern, and the interlayer insulating layer.

REFERENCES:
patent: 6235593 (2001-05-01), Huang
patent: 6255686 (2001-07-01), Takeuchi et al.
patent: 2005/0275109 (2005-12-01), Kuan et al.
patent: 11-168199 (1999-06-01), None
patent: 10-2001-0003048 (2001-01-01), None
patent: 10-2001-0046511 (2001-06-01), None
patent: 10-2003-0001117 (2003-01-01), None
patent: 10-2004-0059822 (2004-07-01), None
patent: 10-0699915 (2007-03-01), None

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