Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2001-03-07
2002-01-01
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Signals
C365S196000, C365S226000, C365S233500, C365S202000, C365S063000
Reexamination Certificate
active
06335885
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device including a delay circuit.
2. Description of the Prior Art
In the semiconductor device, timing adjustment of signals for controlling circuit operation is usually performed by using the delay circuit.
For example, as shown in
FIG. 24
, a conventional delay circuit includes an input portion
3
for receiving a signal, a first delay portion
6
formed by two inverters
5
a,
a first output portion
4
a
for outputting a first delay signal produced by the first delay portion
6
, a second delay portion
7
connected to the input portion
3
in parallel with the first delay portion
6
and formed by four inverters
5
a,
a second output portion
4
b
for outputting a second output signal produced by the second delay portion
7
, a first metallic line ME
1
for connecting the first output portion
4
a
and an output portion
4
for outputting a delay signal of the delay circuit and a second metallic line ME
2
for connecting the second output portion
4
b
and the output portion
4
. Only one of the first and second metallic lines ME
1
and ME
2
is used actually through its selection during production of the semiconductor device. In this conventional delay circuit, since the number of the inverters
5
a
used for the second delay portion
7
is larger than that of the first delay portion
6
, delay amount of the signal on the second metallic line ME
2
is larger than that of the first metallic line ME
1
.
Conventionally, since delay amount of the delay circuit is switched by the metallic lines or the like, it has been impossible to change the delay amount after production of the semiconductor device unless a fuse or the like is formed.
On the other hand, due to recent trend towards low-voltage operation, there is a keen demand for a semiconductor device which is usually operated at, for example, 3V but can be operated also at 2V. However, low voltage operation is prevented by such a cause as dependence of the delay circuit on voltage, thereby resulting in improper operational timing. Therefore, if delay amount is adjusted by the metallic lines as described above, it is difficult to operate the semiconductor device at voltages ranging from ordinary voltage to low voltage.
SUMMARY OF THE INVENTION
Accordingly, an essential object of the present invention is to provide, with a view to eliminating the above mentioned drawbacks of prior art semiconductor devices, a semiconductor device which is capable of generating, even if power source voltage changes, a delay signal corresponding to the power source voltage.
In order to accomplish this object of the present invention, a semiconductor device according to the present invention comprises: a power source voltage detecting means for outputting a voltage detection signal in accordance with a power source voltage; and a delay means which includes an input portion for receiving an input signal, a plurality of delay portions connected to the input portion, a selective portion for selecting one of the delay portions in accordance with the voltage detection signal and an output portion for outputting a delay signal obtained by delaying the input signal by the one of the delay portions.
REFERENCES:
patent: 5991228 (1999-11-01), Pyeon
patent: 9-200014 (1997-07-01), None
Mitsubishi Denki & Kabushiki Kaisha
Tran Andrew Q.
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