Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
1999-08-18
2001-10-16
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S797000, C257S738000, C257S737000, C257S686000, C257S485000, C257S723000, C257S777000, C257S787000, C257S668000, C257S702000, C257S469000, C257S788000
Reexamination Certificate
active
06303998
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a semiconductor device wherein a semiconductor chip is mounted onto a substrate by flip-chip bonding and is fixed thereto via an adhesive means.
BACKGROUND ART
A general structure of a semiconductor device
14
wherein a semiconductor chip
12
is mounted on a substrate
10
made of an electro-insulating material will be described with reference to FIG.
1
and FIG.
2
(
c
) which is a sectional view taken along line A—A in FIG.
1
.
In this regard, flip-chip bonding is a method for bonding the semiconductor chip
12
onto the substrate
10
while a surface of the former carrying active elements thereon is opposed to the substrate
10
. In general, solder bumps
16
are formed as electrodes on the semiconductor chip
12
which is reversed upside down and positioned in place on the substrate
10
, after which the solder bumps
16
are molten all together to connect the electrodes with connector terminals (not shown) formed on the substrate
10
and secure the semiconductor chip
12
on the substrate
10
. Since the solder bumps are arranged not only on the periphery of the semiconductor chip
12
but also at any positions thereon, it is possible to easily obtain as many input/output terminals (I/O) as needed.
Also, since the semiconductor chip
12
is directly mounted on the substrate
10
via solder, there may be cases wherein an underfiller
18
(such as epoxy type resin) is filled in a gap between the substrate
10
and the surface of the semiconductor chip
12
carrying the active elements thereon to reinforce the bonding for the purpose of improving the reliability (strength) of the connecting portion.
When the flip-chip bonding is carried out, an anisotropic electro-conductive film or anisotropic electro-conductive adhesive having the same adhesive property as the underfiller may be used instead of the latter for bonding the semiconductor chip
12
to the substrate
10
. Specifically, a semiconductor chip provided with Au stud bumps prepared by the Au wire-bonding and the substrate coated with the anisotropic electro-conductive adhesive or clad with the anisotropic electro-conductive film is prepared. The semiconductor chip is placed on the substrate via the anisotropic electro-conductive adhesive or the anisotropic electro-conductive film, and the assembly is heated under pressure to connect the semiconductor chip with the substrate. In this regard, the anisotropic electro-conductive adhesive or film contains nickel particles having a size of 3 &mgr;m order in epoxy type resin and is cured by heat in the same manner as in the underfiller.
The above-mentioned prior art semiconductor device
14
, however, has the following problems.
The substrate
10
or the semiconductor chip
12
is preferably of a square shape. This is because when a so-called constant-size substrate of a rectangular shape (including a square shape) is cut into individual square substrates
10
, or when a sliced silicon wafer of a predetermined diameter is cut into individual square semiconductor chips
12
, as many substrates
10
or semiconductor chips
12
as possible are obtainable with least waste, and also the square shape facilitates the patterning efficiency of circuit patterns formed thereon.
The semiconductor chip
12
is mounted onto the substrate
10
so that each of sides of the semiconductor chip
12
is parallel to the corresponding side of the substrate
10
. In addition, generally, the semiconductor chip
12
is mounted onto the substrate
10
so that a center of the former coincides with that of the latter. See FIG.
1
.
When the semiconductor device
14
is mounted onto an originally flat circuit board (not shown), the semiconductor device
14
itself is preferably of a flat shape to enhance the reliable connection between the circuit board and the substrate
10
.
As described before, the connecting portion between the substrate
10
and the semiconductor chip
12
is reinforced, for the purpose of improving the durability or reliability thereof, by the underfiller
18
or the anisotropic electro-conductive adhesive or film which is formed of thermosetting resin and cured through a curing process. Actually, the substrate
10
often warps after the curing process.
This warpage phenomenon of the substrate
10
will be explained with reference to FIGS.
2
(
a
) to
2
(
c
) illustrating states prior to, during and after the curing process, respectively. While the explanation is made on a case wherein the underfiller is used as adhesive interposed between the semiconductor chip
12
and the substrate
10
, the same is true to other cases wherein the anisotropic electro-conductive adhesive or film is used instead thereof.
First, in a state shown in FIG.
2
(
a
) wherein the semiconductor chip
12
is merely placed on the substrate
10
prior to the curing process, no substantial warpage occurs both in the substrate
10
and the semiconductor chip
12
. That is, an amount of warpage is approximately equal to that in the substrate
10
when it stands alone.
Next, during the curing process wherein the underfiller
18
filled in the gap between the substrate
10
and the semiconductor chip
12
is cured, the substrate
10
thermally extends at a high temperature. However, since the underfiller
18
is completely cured after the substrate
10
has fully expanded, no substantial warpage occurs also in both thereof even in this curing process. See FIG.
2
(
b
).
Finally, in a passage wherein a temperature of the assembly is lowering to a normal temperature, the fully extended substrate
10
gradually contracts as the temperature lowers. Since an amount of contraction of a region B of the substrate
10
in which the semiconductor chip
12
is placed (bonded) (in other words, a region of the substrate
10
in contact with the underfiller
18
) is smaller than an amount of contraction of the remaining region of the substrate
10
because the thermal expansion coefficient of the semiconductor chip
12
is smaller than that of the substrate
10
. Accordingly, when viewed from a lateral side, a surface of the substrate
10
(a back surface) opposite to a surface thereof including the region B carrying the semiconductor chip
12
therein (a front surface) more contracts than the front surface, whereby the substrate
10
warps so that the back surface thereof is concave as shown in FIG.
2
(
c
).
This warpage of the substrate
10
; i.e., the warpage of the semiconductor device
14
; has the following relationship with the region B carrying the semiconductor chip
12
.
First, the warpage of the substrate
10
is a phenomenon caused by a fact wherein the region B of the substrate
10
in contact with the underfiller
18
could not fully contract to an extent corresponding to the original thermal expansion coefficient thereof, and therefore, the warpage occurs with the region B as a center; specifically, it occurs in the radial direction all over the substrate
10
from the central point of the region B. Assuming the warpage of the substrate
10
along an imaginary straight line L passing by the central point of the region B, there is a relationship in that the longer a segment of the straight line L in the region B, the more the warpage.
Second, assuming again that the warpage of the substrate
10
is along the imaginary line L, since the substrate
10
warps to be a generally U-shape as a whole with the region B as a center as mentioned above, the maximum displacement in the substrate
10
due to the warpage occurs at the intersection of the imaginary straight line L and a contour of the substrate
10
farthest from the region B. In the square-shaped substrate
10
, the above-mentioned intersection farthest from the region B is resulted when the imaginary straight line L coincides with a diagonal line of the substrate
10
; in other words, such an intersection exists at the respective corner of the substrate
10
. That is, the maximum warpage generates between a pair of corners of the substrate
10
located opposite to each other along a diagonal line.
In t
Pennie & Edmonds LLP
Shinko Electric Industries Co. Ltd.
Williams Alexander O.
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