Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-02-26
2004-12-07
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S506000
Reexamination Certificate
active
06828633
ABSTRACT:
BACKGROUND OF INVENTION
1. Field of Invention
The present invention relates to a semiconductor device. More particularly, the present invention relates to a silicon-on-insulator (SOI) device structure.
2. Description of Related Art
Silicon-on-insulator (SOI) structure is a common substrate for building semiconductor devices. In a SOI structure, an insulation layer (mostly silicon dioxide) is formed not far away from the surface of a silicon substrate. The insulation layer isolates a silicon layer used for building semiconductor devices from the silicon substrate and hence the name silicon-on-insulator. Because the semiconductor devices is formed in a layer separated from the silicon substrate by the insulation layer, some latch-up pathways of transistors in the active area such as the ones between a source terminal and the substrate or a well region and the substrate no longer exists.
Aside from the elimination of pre-existing junction parasitic capacitance in the devices on the bulk silicon wafer and effectively limiting latch-up in semiconductor devices due to parasitic bipolar effect, semiconductor devices on a SOI structure also has a greater immunity against soft errors caused by the bombardment of alpha particles.
A device fabricated on a conventional SOI substrate has two major characteristics, the floating-body effect and body-tied characteristic. The floating-body effect increases the opening current when a device is switched on. However, the floating-body effect also increases the terminating current when the device is shut down. Ultimately, performance and reliability of the device are affected. Thus, the so-called body-tied characteristic is often employed to facilitate the electrical coupling between the source terminal of the device with the main silicon body so that the shut down current is properly controlled. Yet, the body-tied characteristic tends to limit the floating-body effect of the SOI device. Therefore, the floating-body effect and the body-tied characteristic antagonize each other and render their concurrent usage self-defeating.
SUMMARY OF INVENTION
Accordingly, one object of the present invention is to provide a silicon-on-insulator device structure that encompasses the advantages of floating-body effect and body-tied characteristic so that the device can have a higher opening current and a controlled current when the device is shut down. Hence, reliability of the device is improved without compromising device performance.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a silicon-on-insulator (SOI) device structure. The structure includes a silicon-on-insulator substrate, a first transistor and a second transistor. The first transistor and the second transistor are disposed on the silicon-on-insulator substrate such that the two transistors use a common source region. Furthermore, the drain terminal of the second transistor is electrically connected to the main body of the first transistor.
In this invention, a second transistor (a control transistor) is disposed between the source terminal of a first transistor (the silicon-on-insulator device) and a silicon main body. With this circuit configuration, the second transistor (the control transistor) can be turned on or off according to actual requirement. Hence, the advantages of both floating-body effect and body-tied characteristic can be combined to improve device reliability and maintain performance level.
This invention also provides an alternative silicon-on-insulator (SOI) device structure. The structure includes a silicon-on-insulator substrate, a first gate structure and a second gate structure, a source region, a first drain region, a second drain region, a doped region and a conductive line. The first gate structure and the second gate structure is disposed on the silicon-on-insulator substrate. The source region is formed in the silicon-on-insulator substrate between the first gate structure and the second gate structure. The first drain region is formed in the silicon-on-insulator substrate on one side of the first gate structure and the second drain region is formed in the silicon-on-insulator substrate on the other side of the second gate structure. The doped region is formed in the silicon-on-insulator to connect electrically with the silicon-on-insulator substrate underneath the first gate structure. The conductive line is formed over the silicon-on-insulator substrate to connect the doped region and the second drain region electrically.
The doping type of the doped region is identical to that of the silicon-on-insulator substrate and the doping type of the first drain region, the source region and the second drain region is opposite to the silicon-on-insulator substrate. The conductive line connects the second drain region and the doped region through a first contact and a second contact. In other words, the conductive line connects the second drain region with the silicon-on-insulator substrate underneath the first gate structure.
According to the aforementioned embodiment, a first gate structure and a second gate structure are formed over a silicon-on-insulator substrate with the second gate structure serving as a control gate. Thereafter, the source terminal of the first gate structure is connected to the second gate structure. Through the second drain region, the first contact, the conductive line, the second contact and the doped region, the first gate structure is electrically connected to the silicon-on-insulator substrate (main body) underneath the first gate structure. With this circuit configuration, the second gate structure (the control gate) can be turned on or off according to actual requirement. Hence, the silicon-on-insulator device may combine the advantages of both floating-body effect and body-tied characteristic to improve device reliability without compromising the performance level.
This invention also provides a method of operating a silicon-on-insulator device. The silicon-on-insulator device includes a transistor and a control transistor. The transistor and the control transistor share a common source terminal. The drain terminal of the control transistor is electrically connected to the main body of the transistor. To turn the transistor on, a bias voltage Vcc is applied to the drain terminal of the transistor, a bias voltage Vcc is applied to the gate terminal of the transistor and 0V is applied to the gate terminal of the control gate. Thus, the main body of the transistor is electrically disconnected from the source terminal of the transistor so that the transistor has a characteristic of floating-body silicon-on-insulator device. Conversely, to turn the transistor off, a bias voltage Vcc is applied to the drain terminal of the transistor so that the gate terminal and the source terminal of the transistor are at 0V. In the meantime, a bias voltage Vcc is applied to the gate terminal of the control transistor so that the main body and the source terminal of the transistor are electrically connected. Hence, the transistor has a characteristic of non-floating body silicon-on-insulator device.
A control transistor is disposed between the source terminal of a silicon-on-insulator device and a silicon main body in this invention. To switch on the silicon-on-insulator device, the control transistor is shut down. Since the main body of the silicon-on-insulator device is disconnected from the source terminal electrically, the silicon-on-insulator device has a characteristic of floating-body silicon-on-insulator device. Therefore, a higher opening current is obtained. To switch off the silicon-on-insulator device, the control transistor is turned on so that the main body of the silicon-on-insulator device connects electrically with the source terminal and the silicon-on-insulator device has a characteristic of non-floating body silicon-on-insulator device. Thus, a lower shutdown current is obtained. In this invention, a control transistor is disposed betwee
Chi Li-Lun
Chung Jen-Chi
Huang Chiu-Tsung
Liao Ke-Kung
Jiang Chyun IP Office
Pizarro-Crespo Marcos D.
Powerchip Semiconductor Corp.
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