Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-03-28
2006-03-28
Ngô, Ngân V. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S347000
Reexamination Certificate
active
07019365
ABSTRACT:
A semiconductor device according to an aspect of the present invention comprises a first semiconductor layer and a plurality of second semiconductor layers. The first semiconductor layer is formed in a first region of a semiconductor substrate with one of an insulating film and a cavity interposed between the semiconductor substrate and the first semiconductor layer. The plurality of second semiconductor layers is formed in second regions of the semiconductor substrate.
REFERENCES:
patent: 4879585 (1989-11-01), Usami
patent: 5159416 (1992-10-01), Kudoh
patent: 5489547 (1996-02-01), Erdeljac et al.
patent: 5565697 (1996-10-01), Asakawa et al.
patent: 5589695 (1996-12-01), Malhi
patent: 5686755 (1997-11-01), Malhi
patent: 5894152 (1999-04-01), Jaso et al.
patent: 6034399 (2000-03-01), Brady et al.
patent: 6127701 (2000-10-01), Disney
patent: 6140163 (2000-10-01), Gardner et al.
patent: 6191451 (2001-02-01), Nowak et al.
patent: 6214694 (2001-04-01), Leobandung et al.
patent: 6229179 (2001-05-01), Song et al.
patent: 6288427 (2001-09-01), Huang
patent: 6380037 (2002-04-01), Osanai
patent: 11-17001 (1999-01-01), None
patent: 1999-0068200 (1999-08-01), None
patent: 2000-0035489 (2000-06-01), None
Robert Hannon, et al., “0.25mm Merged Bulk DRAM and SOI Logic Using Patterned SOI”, 2000 Symposium on VLSI, Technology Digest of Technical Papers, (2 pages).
H.L. Ho, et al., “A 0.13 μm High-Performance SOI Logic Technology with Embedded DRAM for System-On-A-Chip Application”, 2001 IEDM Technical Digest, (4 pages).
Mizushima Ichiro
Nagano Hajime
Nitta Shinichi
Sato Tsutomu
Udo Yuso
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