Semiconductor device for switching a defective memory cell...

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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Details

C365S230030, C711S005000, C711S102000

Reexamination Certificate

active

07489571

ABSTRACT:
A semiconductor device is provided for outputting data read from a read only storage device. The semiconductor device includes a read only storage device including memory cells, an address signal line for transmitting an address signal to each read only storage device, and a switching device to which the address signal is inputted. The address signal indicates an address of memory cells storing data to be read. The switching device includes an address storage circuit, a bit storage circuit and a switching storage circuit. The address storage circuit stores address information of a defective memory cell of the read only storage devices and detects whether or not memory cells storing data selected by an address signal includes a defective memory cell. The bit storage circuit stores bit information indicating which bit of data stored in memory cells including a defective memory cell is defective, and outputs a controlling signal. The switching circuit inputs the controlling signal and data outputted from a read only storage device which is selected by an address signal and outputs the data from the read only storage device. The switching circuit inverts a defective bit of the data outputted from the read only storage device in response to receipt of the controlling signal from the bit storage circuit and outputs data whose defective bit is inverted instead of the data outputted from the read only storage device.

REFERENCES:
patent: 5452258 (1995-09-01), Hotta
patent: 5467457 (1995-11-01), Kohda et al.
patent: 5680354 (1997-10-01), Kawagoe
patent: 63-213200 (1988-09-01), None
patent: 64-38852 (1989-02-01), None
patent: 01/20454 (2001-03-01), None

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