Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2001-12-03
2004-01-13
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C257S153000, C257S154000, C257S356000, C438S011000, C438S014000, C324S765010, C324S762010, C324S526000
Reexamination Certificate
active
06677608
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a device for detecting defects, and more particularly to a semiconductor device for detecting gate defects.
2. Description of the Prior Art
In the continuous development for integrated circuits (IC) of higher density and chips of reduced size, alignment of various layers and isolation or connection of various elements are major issues. Therefore, various tests are usually conducted at specific stages to investigate the performance of process equipment and elements produced to ensure the equipment is well-tuned and to examine the product quality.
Following the development of reduced IC size and higher density, the tolerance for defects is reduced greatly. Therefore, defects must be reduced to increase the yield. Generally, the lower the defect density, the higher the yield.
At the moment, conventional detection for defects uses optical theory to measure parameters for defect, thickness of thin films etc. However, due to the limitation of optical equipment, resolution and accuracy for ultramicron process are not adequate. Therefore, such conventional detection methods are far from ideal.
SUMMARY OF THE INVENTION
The object of the present invention is to solve the above-mentioned problems by providing a semiconductor device for detecting gate defects by electrical measurement.
Another object of the present invention is to provide a method for fabricating a semiconductor device for detecting gate defects, which utilizes general and simple processes to form the semiconductor device.
Another object of the present invention is to provide a semiconductor device for detecting gate defects, wherein the semiconductor device has high sensitivity and fast detection efficiency to precisely detect defects in gates.
In addition, during the process of forming gates, which comprises deposition, photolithography, etching, cleaning etc, where the related devices used are CVD reactor, stepper, etcher, and wet sink, their operating condition can be tested using the semiconductor device of the present invention.
To achieve the above-mentioned objects, the present invention provides a semiconductor device for detecting gate defects, comprising: a semiconductor substrate having an oxide layer on the top; a gate having spacers formed on the oxide layer and surrounding the semiconductor substrate, wherein the gate is also patterned to divide the semiconductor substrate to two parts not electrically connected; and a conductive layer formed on the semiconductor outside the gate.
According to the present invention, the method for fabricating in-line detect device for self-aligned contact defects, comprises applying a ground voltage and a set voltage respectively to two parts divided by the gate in the semiconductor device as described above; and measuring current between the two parts.
The semiconductor device for detecting gate defects of the present invention is shown in
FIG. 1
, where
10
represents the gate, and
20
is the conductive layer. In order to is a the structure of the semiconductor device,
FIG. 2
is a cross-section along line A-A′ in FIG.
1
. In
FIG. 2
,
50
represents the semiconductor substrate,
40
represents the oxide layer,
20
represents the conductive layer and
30
the spacers on other sides of the gate
10
.
FIG. 3
is a cross-section along line B-B′ in FIG.
1
. In the semiconductor device of the present invention, the gate surrounds the whole semiconductor substrate, and also divides the semiconductor substrate into two parts not electrically connected. Therefore, when defects in the gate cause shorts, a current will be detected by electrical measurement.
The pattern of the gate is not restricted, as long as it divides the substrate into two parts without electrical connection.
FIG. 4
is as another example of the pattern of the gate. The gate is polysilicon or other conductive metal, such as tungsten.
According to the semiconductor device of the invention, the semiconductor is divided into two parts by the gate, hence, if defects occur in the gate, shorts also occur. Under this circumstance, by applying the two parts of the semiconductor substrate to the ground connection and a set voltage respectively, defects in the semiconductor substrate will be detected.
REFERENCES:
patent: 5418389 (1995-05-01), Watanabe
patent: 5889410 (1999-03-01), El-Kareh et al.
Im Junghwa
Ladas & Parry
Promos Technologies Inc.
Thomas Tom
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