Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2001-02-26
2003-05-13
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S678000, C257S701000, C257S703000
Reexamination Certificate
active
06563211
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device for controlling electricity and, more particularly, to the semiconductor device of kind including an insulating substrate having a back-side metal pattern on its back face, which pattern is bonded to a metal base plate by a binder, and a pair of circuit patterns on its front face.
2. Description of the Prior Art
IPM (Intelligent Power Module) has been known as a semiconductor device for controlling electricity and is used in, for example, a drive control of an electric car. However, a need has been recognized for the electricity control device that has a longer life and a higher reliability in severe conditions of heat or vibration.
FIGS. 4 through 7
show an example of such a conventional semiconductor device for controlling electricity.
In
FIGS. 4 through 6
, reference numeral
1
denotes a generally rectangular metal base plate made of, for instance, a copper-molybdenum alloy. This metal base plate
1
has boltholes each defined in a corner region thereof for attachment of the metal base plate
1
to a radiating fin assembly (not shown in the Figures). Reference numeral
2
denotes insulating substrates fixed on the metal base plate
1
by means of soldering. Each of those insulating substrates
2
consists of an insulator plate
3
made of aluminum nitride, a pair of copper circuit patterns
4
formed on a front face of the insulator plate
3
and a back-side pattern
5
formed on a back face of the plate
3
. Each insulating substrate
2
is fixed on the metal base plate
1
with the back-side pattern
5
soldered thereto. Reference numeral
6
denotes insulated gate bipolar transistors (IGBTs) as switching semiconductor devices for controlling electricity, and reference numeral
7
denotes free-wheel diodes (hereinafter, referred as FWDs) each paired with the adjacent IGBT
6
. A pair of IGBT
6
and FWD
7
are soldered on each of the circuit patterns
4
. Reference numeral
9
denotes a solder layer interposed between the metal base plate
1
and the back-side pattern
5
of the insulating substrate
2
, and reference numeral
9
a
denotes a solder layer interposed between each circuit pattern
4
and the associated pair of IGBT
6
and FWD
7
. Reference numeral
10
denotes a pair of thermistors mounted on a center area of each insulated substrate
2
between the circuit patterns
4
of the associated pair for detecting the temperature of such insulating substrate
2
.
Reference numeral
11
denotes a resinous cover having boltholes
11
a
defined therein in alignment with the respective boltholes in the metal base plate
1
for attachment thereof together with the metal base plate
1
to the radiating fin assembly (not shown). The metal base plate
1
and the cover
11
are assembled together to define a generally rectangular box-like case with the base plate
1
serving as a bottom wall, and the insulating substrates
2
, IGBTs
6
and FWDs
7
on the metal base plate
1
are thus encased within the case so defined. Reference numeral
12
denotes main circuit terminals inserted into the cover
11
. Each of those main circuit terminals has outer and inner ends with the outer end positioned outside the case and with the inner end connected to the associated IGBT
6
and FWD
7
by means of aluminum wires
13
. Reference numeral
14
denotes electrodes for a controlling circuit, and reference numeral
15
denotes a cover plate for the above-described case. It is to be noted that respective connections between the electrodes
14
and the controlling circuit board are not shown.
It is to be noted that the terminals employed in the illustrated electricity control device and generally identified by
12
as described above are many, but have different functional attributes. Accordingly, the terminals
12
have respective suffixes annexed (P), (N), (U), (V) and (W) thereto to show that the terminals
12
(P) and
12
(N) serve as positive and negative input terminals, respectively, and the terminals
12
(U),
12
(V) and
12
(W) serve as respective three-phase output terminals, i.e., U-phase, V-phase and W-phase output terminals, respectively. In addition, symbols (U), (V) and (W) affixed to the reference numeral
2
to denote each of the insulating substrates
2
in general are intended to show that the insulated substrates
2
(U),
2
(V) and
2
(W) are those associated respectively with three phase switching circuits each comprised of the corresponding IGBT
6
and the FWD
7
connected parallel, but in reverse relation to such IGBT
6
. Symbols (H) and (L) affixed to the reference numeral
4
used to generally identify each circuit pattern denote respective two switching devices in each switching circuit in higher and lower voltage side, respectively.
FIG. 7
shows a circuit diagram of a main inverter circuit included in the semiconductor device for controlling electricity shown in
FIGS. 4 through 6
. Even in the circuit diagram of
FIG. 7
, similar symbols P, N, U, V and W are employed whicyh correspond respectively to
12
(P),
12
(N),
12
(U),
12
(V) and
12
(W). Similarly, symbols
2
(U),
2
(V),
2
(W),
4
(H) and
4
(L) used in
FIG. 7
correspond to
2
(U),
2
(V),
2
(W),
4
(H) and
4
(L) used in
FIGS. 4 through 6
, respectively.
Arrangement of IGBTs
6
and FWDs
7
on the insulating substrates
2
, mounted on the metal base plate
1
, will now be described. In
FIGS. 4 through 6
, the three insulating substrates
2
are disposed on the metal base plate
1
in line with each other and spaced a predetermined distance from each other. Each substrate
2
is soldered on the metal base plate
1
via the back-side pattern on the back face of the substrate. The solder layer
9
is formed between the metal base plate
1
and the back-side pattern on each substrate
2
. Each pair of circuit patterns
4
on the front face of the insulating substrate
2
are placed above the back-side pattern
5
via the associated insulator plate
3
.
Each circuit pattern
4
is of a generally L-shaped configuration extending in part along one of four sides of the corresponding insulator plate
3
and in part along another one of the four sides thereof which is continued from and lies perpendicular to such one of the four sides of the corresponding insulator plate
3
. Two L-shaped circuit patterns
4
on the respective insulator plate
3
are disposed centrosymmetrically with respect to each other. In each circuit pattern
4
, IGBT
6
is positioned near the corner, FWD
7
is next to IGBT
6
along one side, and electrode-pattern region
4
a
is along another side of the insulator plate
3
. That is, IGBT
6
and the electrode-pattern regions
4
a
are placed alternately on the metal base plate
1
so that the inner ends of the main circuit terminals
12
extending into the case are connected the shortest distance with IGBT
6
and the electrode-pattern regions
4
a
. A pair of thermistors
10
for detecting the temperature of the insulating substrate
2
are disposed between the two circuit patterns
4
at a location generally in alignment with the center of the insulating substrate
2
. Hereinafter, the function of the device will be described. During a current flowing in the main circuit, IGBT
6
repeats switching motion, and IGBT
6
and FWD
7
generate a heat which is then transferred to the metal base plate
1
through the solder layer
9
a
, the circuit pattern
4
, the insulator
3
, the back-side pattern
5
and the solder layer
9
. The heat transmitted to the metal base plate
1
is diffused to the radiating fin assembly (not shown) attached to the metal base plate
1
.
During the heat transfer, the solder layer
9
that is used to connect the back-side pattern
5
with the metal base plate
1
suffers from a complicated heat stress. The heat stress is caused by a variety of reasons; a difference in thermal-expansion coefficient between the metal base plate
1
and the insulator plate
3
, which is combined with the back-side pattern
5
; a temperature gradient
Fukada Masakazu
Kimoto Nobuyoshi
Nishibori Hiroshi
Takao Haruo
Yoshida Takanobu
Flynn Nathan J.
Mitsubishi Denki & Kabushiki Kaisha
Mondt Johannes P
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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