Semiconductor device fabrication method and semiconductor...

Details Semiconductor device fabrication method and semiconductor... Semiconductor device fabrication method and semiconductor...

2007-11-13

2007-11-13

Nguyen, Thanh (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S691000, C438S692000, C257SE21230

Reexamination Certificate

active

10868358

ABSTRACT:
A polishing-rate distribution of a target film is compared with a desired post-polishing film-thickness distribution of the target film, thereby obtaining a pre-polishing film-thickness distribution of the target film by a reverse calculation, so that film growing conditions can be controlled in advance so as to allow the target film to have, after polishing, a film-thickness distribution that is the same as the desired film-thickness distribution. Therefore, even if there is a possibility that variation in the step height of the wafer surface might be produced by polishing, the finally obtained target film's film-thickness distribution can be the desired film-thickness distribution. Accordingly, semiconductors in which device-to-device variation in characteristic is reduced can be provided.

REFERENCES:
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patent: 2004/0063224 (2004-04-01), Paik
patent: 2000-232078 (2000-08-01), None
patent: 2002-134466 (2002-05-01), None
patent: 2003-158108 (2003-05-01), None
Wolf et al. “Silicon Processing for the VLSI ERA”, 1986, vol. 1, pp. 171-174.
B. Davari et al., “A Variable-Size Shallow Trench Isolation (STI) Technology with Diffused Sidewall Doping for Submicron CMOS”, IEDM Tech. Digest, pp. 92-95, 1988.

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