Semiconductor device fabrication method

Details Semiconductor device fabrication method Semiconductor device fabrication method

2007-03-08

2008-12-16

Nhu, David (Department: 2895)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S680000, C438S706000, C257SE21170, C257S021000, C257SE21278, C257SE21293, C257SE21304

Reexamination Certificate

active

07465663

ABSTRACT:
In fabrication of a semiconductor device which is provided with resistances and MOS transistors on the same substrate, conduction failures of contacts and leaching of wiring metal into a silicon substrate is prevented. Firstly, an underlying structure is prepared. Then, a silicon oxide layer is formed on the underlying structure. Then, a silicon nitride layer is formed on the silicon oxide layer. Then, an inter-layer insulation layer is formed on the silicon nitride layer. Then, a contact hole is formed penetrating through a laminate of the silicon oxide layer, the silicon nitride layer and the inter-layer insulation layer. A thickness of the silicon oxide layer is a value in a range from 32 nm to 48 nm.

REFERENCES:
patent: 6201735 (2001-03-01), Kato et al.
patent: 6452274 (2002-09-01), Hasegawa et al.
patent: 6764945 (2004-07-01), Ashihara et al.
patent: 2004-119697 (2004-04-01), None

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