Semiconductor device equipped with simple stable switching circu

Details Semiconductor device equipped with simple stable switching circu Semiconductor device equipped with simple stable switching circu

1995-10-31

1997-01-07

Nelms, David C.

Static information storage and retrieval

Powering

36518911, 327530, 327536, 327548, G11C 700

Patent

active

055924301

ABSTRACT:
An electrically erasable and programmable read only memory device is equipped with a supply voltage switching circuit responsive to a write enable signal for selectively supplying a write-in voltage and a read-out voltage through a power distribution line to a row address decoder unit, and the supply voltage switching circuit includes a series of first and second p-channel enhancement type field effect transistors having respective gate electrodes coupled to the write-in voltage line and the power distribution line, a third p-channel enhancement type field effect transistor having a gate electrode coupled to the power distribution line and a controlling sub-circuit responsive to the write enable signal so as to supply first and second control signals of the ground level and a third control signal of the potential level equal to the power distribution line to the first and second p-channel enhancement type field effect transistors and the third p-channel enhancement type field effect transistor when the write enable signal is in the active level.

REFERENCES:
patent: 5258950 (1993-11-01), Murashima et al.
patent: 5461591 (1995-10-01), Kim et al.
Miyawaki et al, "A New Erasing And Row Decoding Scheme For Low Supply Voltage Operation 16-Mb/64-Mb Flash Memories", Apr. 1992, pp. 583-585, IEEE Journal of Solid-State Circuits, vol. 27, No. 4.
Ohtsuka et al, "A 62ns 16Mb CMOS EPROM With Adress Transition Detection Technique", Mar. 1991, pp. 262-263, International Solid-State Circuits Conference.

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