Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
2008-05-27
2008-05-27
Clark, S. V. (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257S778000, C257S707000
Reexamination Certificate
active
07378747
ABSTRACT:
A semiconductor device chip includes channel blocks each of which includes channels, each of the channels including unit devices placed in a substrate and well regions; first metal interconnection lines connected to the unit devices comprising the channels to receive and transfer data signals from and to the external side; normal bumps for transferring the data signals received by the first metal interconnection lines through first external interconnection lines to be connected to the external side; second metal interconnection lines placed between the channel blocks, each of the second metal interconnection lines being connected to one of the substrate and a corresponding well region; and first heat transfer bumps placed over the second metal interconnection lines to receive the heat generated during driving the channel blocks through the second metal interconnection lines and transfer the received heat to second external interconnection lines to be connected to the external side.
REFERENCES:
patent: 4795077 (1989-01-01), Geyer et al.
patent: 2002/0053726 (2002-05-01), Mikubo et al.
patent: 2005/0218432 (2005-10-01), Matsuzaki et al.
patent: 2006/0102957 (2006-05-01), Liaw
patent: 2006/0110859 (2006-05-01), Shigemura et al.
Clark S. V.
Magna-Chip Semiconductor, Ltd.
Morgan & Lewis & Bockius, LLP
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