Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2001-10-09
2002-12-10
Lebentritt, Michael S. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Testing
C365S194000, C365S233100
Reexamination Certificate
active
06493279
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device including an oscillation circuit for producing a signal having a prescribed period.
2. Description of the Background Art
An oscillation circuit such as a ring oscillator is often provided when there is a need for a clock signal changing at a prescribed period inside a semiconductor device. Conventionally, for a ring oscillator, an applied bias potential was changed by a switch using a fuse, and the frequency of a ring oscillator was changed, of which output was externally taken out for monitoring.
However, in order to measure the frequency of a ring oscillator accurately, it was necessary to start an oscillation and wait until it becomes stable before measuring an oscillation frequency.
Further, in order to measure the frequency of a self-oscillating signal automatically, a test machine needs to be equipped with such a function.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device capable of monitoring an oscillation frequency in a simple manner and regulating the same.
In summary, the present invention provides a semiconductor device having a normal mode and a test mode as operation modes, including an oscillation circuit and an internal circuit.
The oscillation circuit self-oscillates and outputs a clock signal in the normal mode. The internal circuit operates in response to the clock signal.
The oscillation circuit includes an inversion and delay circuit and a path switch portion.
The inversion and delay circuit delays and inverts a signal applied to a first internal node and outputs the signal to a second internal node. In normal mode, the path switch portion forms a loop which transmits a signal at the second internal node to the first internal node and generates the clock signal. In the test mode, the path switch portion transmits an externally applied test input signal to the first internal node, and externally outputs as a monitor signal a signal output to the second internal node in response to the test input signal.
Therefore, it is the main advantage of the present invention that the oscillation frequency of the oscillation circuit self-oscillating in the normal mode can be easily measured in the test mode.
REFERENCES:
patent: 5717652 (1998-02-01), Ooishi
patent: 5862094 (1999-01-01), Kawabata et al.
patent: 6178108 (2001-01-01), Miyatake et al.
patent: 6215345 (2001-04-01), Yashiba et al.
patent: 6385125 (2002-05-01), Ooishi et al.
Sato Hirotoshi
Shimizu Tadayuki
Tsukude Masaki
Lebentritt Michael S.
McDermott & Will & Emery
Nguyen Hien
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