Semiconductor device capable of preventing moisture...

Details Semiconductor device capable of preventing moisture... Semiconductor device capable of preventing moisture...

2005-07-05

2005-07-05

Vu, Hung (Department: 2811)

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

Using structure alterable to nonconductive state

C438S601000

Reexamination Certificate

active

06913953

ABSTRACT:
A fuse area of a semiconductor device capable of preventing moisture-absorption and a method for manufacturing the fuse area are provided. When forming a guard ring for preventing permeation of moisture through the sidewall of an exposed fuse opening portion, an etch stop layer is formed over a fuse line. A guard ring opening portion is formed using the etch stop layer. The guard ring opening portion is filled with a material for forming the uppermost wiring of multi-level interconnect wirings or the material of a passivation layer, thereby forming the guard ring concurrently with the uppermost interconnect wiring or the passivation layer. Accordingly, permeation of moisture through an interlayer insulating layer or the interface between interlayer insulating layers around the fuse opening portion can be efficiently prevented by a simple process. In addition, the etch stop layer is also formed under the fuse opening portion so that an insulating layer remaining on the fuse line can be controlled to have a predetermined thickness when forming the fuse opening portion, thereby improving the cutting efficiency of fuses.

REFERENCES:
patent: 5652459 (1997-07-01), Chen
patent: 5970346 (1999-10-01), Liaw
patent: 6294474 (2001-09-01), Tzeng et al.
patent: 9-069571 (1997-03-01), None
patent: 10308459 (1998-11-01), None
English translation abstract of Japanese Patent No. JP10308459.
English translation of Japanese Patent Publication No. 9-069571.

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